IP Library Granted Patent US 10,361,845
Granted Patent B2
US 10,361,845 · App. 16/165,933 · Granted Jul 23, 2019

Systems and methods securing an autonomous device

Inventors: Jeremie Miller (Reno, NV); Thomas Muldowney (Reno, NV); Allison Clift-Jennings (Reno, NV)
Assignee: SWFL, Inc.
H04L9/0822G06F21/572G06F21/72G06F21/79H04L9/0861H04L9/3247H04L9/3271
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Quick Facts
Patent No.
US 10,361,845
App. No.
16/165,933
Granted
Jul 23, 2019
Kind
B2
Abstract

A system and method for cryptographically securing a device includes initializing a cryptographic processing circuit which includes provisioning a cryptographic key store associated with the cryptographic processing circuit with cryptographic key material; and establishing a first cryptographically secured connection between a main central processing unit of the autonomous device and the cryptographic processing circuit of the device; and implementing a cryptographic validation of resident firmware of the main central processing unit by validating a cryptographic digital signature ascribed to the resident firmware against an up-to-date cryptographic digital signature used for installing and/or updating the resident firmware of the main central processing circuit.

Claims (72)

1. A system that cryptographically secures components of a printed circuit board assembly of a device, the system comprising:

a printed circuit board assembly comprising:

a main central processing circuit,

a cryptographic processing circuit, and

a physically secured cryptographic key store;

a first provisioning source comprising a first provisioning computer that, at a time of manufacture:

[1] provisions the main central processing circuit with resident firmware; and

[2] cryptographically signs the resident firmware with a master cryptographic key;

[3] provisions the physically secured cryptographic key store with asymmetric cryptographic key material,

wherein, after provisioning the main central processing circuit and provisioning the physically secured cryptographic key store, establishing a first cryptographically secured communication channel between the main central processing circuit and the cryptographic processing circuit using the asymmetric cryptographic key material,

wherein the main central processing circuit implements a cryptographic validation of the resident firmware by validating a cryptographic digital signature ascribed by the first provisioning source to the resident firmware against an up-to-date cryptographic signature used for installing new resident firmware or updating the resident firmware of the main central processing circuit; and

wherein the main central processing circuit uses the first cryptographically secured communication channel to control an operation of the cryptographic processing circuit.

2. The system according to claim 1 , wherein

the asymmetric cryptographic key material comprises a plurality of public cryptographic keys that are derived from the master cryptographic key of the first provisioning source.

3. The system according to claim 1 , wherein

the asymmetric cryptographic key material comprises a plurality of private/public cryptographic key pairs that are derived from the master cryptographic key of the first provisioning source.

4. The system according to claim 1 , wherein

the main central processing circuit, via the first cryptographically secured communication channel, controls the cryptographic processing circuit to implement a secure operation of an autonomous radio communication device.

5. A method that cryptographically secures components of a printed circuit board assembly of a device, the method comprising:

manufacturing a printed circuit board assembly comprising:

a main central processing circuit,

a cryptographic processing circuit, and

a physically secured cryptographic key store;

at a time of manufacturing the printed circuit board assembly, using a first provisioning computer to:

[1] provision the main central processing circuit with resident firmware; and

[2] cryptographically sign the resident firmware with a master cryptographic key;

[3] provision the physically secured cryptographic key store with asymmetric cryptographic key material,

after provisioning the main central processing circuit and provisioning the physically secured cryptographic key store, establishing a first cryptographically secured communication channel between the main central processing circuit and the cryptographic processing circuit using the asymmetric cryptographic key material,

wherein the main central processing circuit uses the first cryptographically secured communication channel to control an operation of the cryptographic processing circuit; and

wherein the main central processing circuit implements a cryptographic validation of the resident firmware by validating a cryptographic digital signature ascribed by the first provisioning computer to the resident firmware against an up-to-date cryptographic signature used for installing new resident firmware or updating the resident firmware of the main central processing circuit.

6. The method according to claim 5 , wherein

establishing the first cryptographically secured communication channel includes:

at the main central processing circuit, receiving a secure pairing request from the cryptographic processing circuit;

in response to receiving the secure pairing request, providing a cryptographically signed response to the cryptographic processing circuit;

at the cryptographic processing circuit, validating the cryptographically signed response based on a cryptographic key derived from the master cryptographic key of the first provisioning computer.

7. The method according to claim 6 , further comprising:

if the cryptographic processing circuit successfully validates the cryptographically signed response from the main central processing circuit, initiating an encrypted cryptographic key exchange, wherein the encrypted cryptographic key exchange includes:

using the cryptographic key material to generate at the cryptographic processing circuit an asymmetric cryptographic key pair comprising a private/public cryptographic key pair; and

transmitting from the cryptographic processing circuit to the main central processing circuit a public cryptographic key of the private/public cryptographic key pair, wherein the public cryptographic key is used by the main central processing circuit in future communications with the cryptographic processing circuit.

8. The method according to claim 7 , further comprising:

at the main central processing circuit, using the public cryptographic key to communicate with or control operations of the cryptographic processing circuit.

9. The system according to claim 1 , further comprising:

a second provisioning source comprising a second provisioning computer that provisions the main central processing circuit with primary operating instructions only after the main processing circuit cryptographically validates an authority of the second provision computer to provision the main central processing circuit.

10. The method according to claim 5 , further comprising:

generating by the main central processing circuit an encrypted file system on a flash memory, wherein the encrypted file system operates to encrypt data stored on the flash memory that is at rest.

11. The method according to claim 5 , wherein

the master cryptographic key comprises a single-purpose cryptographic key, wherein the single-purpose cryptographic key operates to initialize or boot the cryptographic processing circuit.

12. The method according to claim 5 , wherein

the master cryptographic key comprises a limited-purpose cryptographic key, wherein the limited-purpose cryptographic key operates to:

(i) initialize or boot the cryptographic processing circuit and

(ii) implement the cryptographic validation of the resident firmware of the main central processing circuit.

13. The method according to claim 5 , wherein

the asymmetric cryptographic key material comprises a plurality of public cryptographic keys that are derived from the master cryptographic key of the first provisioning source.

14. The method according to claim 5 , wherein

the asymmetric cryptographic key material comprises a plurality of private/public cryptographic key pairs that are derived from the master cryptographic key of the first provisioning source.

15. The method according to claim 5 , wherein

the main central processing circuit, via the first cryptographically secured communication channel, controls the cryptographic processing circuit to implement a secure operation of an autonomous radio communication device.

16. The method according to claim 5 , further comprising:

transitioning management control of the printed circuit board assembly from a first provisioning source to a second provisioning source by generating a second master cryptographic key for the second provisioning source using the master cryptographic key of the first provisioning source.

17. The method according to claim 5 , further comprising:

provisioning, by a second provisioning computer, the main central processing circuit with primary operating instructions only after the main processing circuit cryptographically validates an authority of the second provision computer to provision the main central processing circuit.

18. A device security method that cryptographically secures a computing components of a device, the device security method comprising:

implementing a first cryptographic binding step of:

at a physically secure location, using a master cryptographic key by a first provisioning source recognized by a cryptographic processing circuit to initialize the cryptographic processing circuit by provisioning a cryptographic key store associated with the cryptographic processing circuit of the device with cryptographic key material;

implementing a second cryptographic binding step:

establishing a first cryptographically secured pairing between a main central processing circuit of the device and the cryptographic processing circuit of the device by exclusively exchanging one or more cryptographic keys between the cryptographic processing circuit and the main central processing circuit;

implementing a third cryptographic binding step:

establishing a second cryptographically secured pairing between the main central processing circuit and resident firmware of the main central processing circuit, wherein the main central processing circuit implements a cryptographic validation of the resident firmware by validating a cryptographic digital signature ascribed by the first provisioning source to the resident firmware against an up-to-date cryptographic signature used for installing new resident firmware or updating the resident firmware of the main central processing circuit; and

implementing a fourth cryptographic binding step:

generating by the first provisioning source a second master cryptographic key for a second provisioning source based on a master cryptographic key of the first provisioning source.

19. The device security method according to claim 18 , wherein

the main central processing circuit, via the first cryptographically secured pairing, controls the cryptographic processing circuit to implement a secure operation of an autonomous radio-based communication device.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 29, 2020
From: SWFL, INC.
To: CLIFT-JENNINGS, ALLISON; RAYMOR, BUD L
Reel/Frame 052522/0569 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 29, 2020
From: CLIFT-JENNINGS, ALLISON; RAYMOR, BUD L.
To: BEAN HOLDINGS, LLC
Reel/Frame 052522/0779 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 12, 2019
From: MILLER, JEREMIE; MULDOWNEY, THOMAS; CLIFT-JENNINGS, ALLISON
To: SWFL, INC.
Reel/Frame 048305/0541 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED ON REEL 047239 FRAME 0381. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jan 4, 2019
From: MILLER, JEREMIE; MULDOWNEY, THOMAS; CLIFT-JENNINGS, ALLISON
To: SWFL, INC., D/B/A "FILAMENT"
Reel/Frame 048008/0966 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2018
From: MILLER, JEREMIE; MULDOWNEY, THOMAS; CLIFT-JENNINGS, ALLISON
To: SWFL, INC. (FILAMENT)
Reel/Frame 047239/0381 →
Continuity (3)
Continuation 15982885 · May 17, 2018
Provisional Application 62508903 · May 19, 2017
Related Publication 20190058584A1 · Feb 21, 2019