IP Library Granted Patent US 10,484,213
Granted Patent B2
US 10,484,213 · App. 16/169,852 · Granted Nov 19, 2019

DC offset cancellation and crosspoint control circuit

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Quick Facts
Patent No.
US 10,484,213
App. No.
16/169,852
Granted
Nov 19, 2019
Kind
B2
Abstract

A circuit and method in an amplifier circuit for filtering a DC offset in differential input signals and inserting a programmable adjustable crosspoint offset in differential output signals. An amplifier circuit includes a differential amplifier circuit configured to amplify differential input signals into differential output signal. The amplifier circuit further includes a feedback circuit coupled between the differential output signals and the differential input signals. The feedback circuit is configured to generate a programmably adjustable crosspoint offset in the differential output signal and a programmably adjustable cutoff frequency of the feedback circuit. An amplifier method includes amplifying differential input signals into differential output signals, generating a programmably adjustable crosspoint offset in the differential output signal, and generating a programmably adjustable cutoff frequency of a feedback circuit between the differential output signals and the differential input signals.

Claims (35)

1. An amplifier circuit, comprising:

a differential amplifier circuit configured to amplify differential input signals into differential output signals; and

a feedback circuit coupled between the differential output signals and the differential input signals and configured to generate a programmably adjustable crosspoint offset in the differential output signals and a programmably adjustable cutoff frequency of the feedback circuit, wherein the feedback circuit includes an offset frequency adjustment circuit configured to adjust the programmably adjustable cutoff frequency, and the offset frequency adjustment circuit includes a resistance control circuit configured to control active devices generating a variable filter resistance.

2. The amplifier circuit of claim 1 , wherein the feedback circuit comprises a crosspoint control circuit including programmably adjustable current sources to cooperatively generate the programmably adjustable crosspoint offset in the differential output signals.

3. The amplifier circuit of claim 1 , wherein the offset frequency adjustment circuit configured as a low pass filter.

4. The amplifier circuit of claim 3 , wherein the offset frequency adjustment circuit includes a variable resistance network configured to generate the variable filter resistance for the low pass filter.

5. The amplifier circuit of claim 4 , wherein the variable resistance network comprises the active devices to generate the variable filter resistance.

6. The amplifier circuit of claim 1 , wherein the resistance control circuit is configured to compensate for process-voltage-temperature (PVT) variations in the active devices generating the variable filter resistance.

7. An amplifier circuit comprising:

a differential amplifier circuit configured to amplify differential input signals into differential output signals; and

a feedback circuit coupled between the differential output signals and the differential input signals and configured to generate a programmably adjustable crosspoint offset in the differential output signals and a programmably adjustable cutoff frequency of the feedback circuit, wherein the feedback circuit comprises an offset frequency adjustment circuit configured to adjust the programmably adjustable cutoff frequency, wherein the offset frequency adjustment circuit includes at least one capacitor for each of the differential output signals each coupled a capacitance multiplier circuit to generate filter capacitance for the low pass filter.

8. An amplifier method, comprising:

amplifying differential input signals into differential output signals;

generating a programmably adjustable crosspoint offset in the differential output signals;

generating a programmably adjustable cutoff frequency of a feedback circuit between the differential output signals and the differential input signals, including adjusting the programmably adjustable cutoff frequency of the feedback circuit as a low pass filter; and

generating a filter resistance for the low pass filter based in part on a variable resistance in the feedback circuit, the variable resistance controlled by a resistance control circuit.

9. The amplifier method of claim 8 , wherein the generating the programmably adjustable crosspoint offset comprises generating the programmably adjustable crosspoint offset in the differential output signals by controlling programmably adjustable current sources in the feedback circuit.

10. The amplifier method of claim 8 , wherein the filter resistance for the low pass filter is generated based in part on a variable resistance network for generating the variable resistance in the feedback circuit.

11. The amplifier method of claim 10 , wherein the variable resistance network comprises active devices for generating the variable resistance.

12. The amplifier method of claim 11 , wherein the variable resistance is generated by controlling the active devices from the resistance control circuit.

13. The amplifier method of claim 8 , wherein the variable resistance is further generated by compensating for process-voltage-temperature (PVT) variations in the active devices.

14. An amplifier method comprising:

amplifying differential input signals into differential output signals;

generating a programmably adjustable crosspoint offset in the differential output signals;

generating a programmably adjustable cutoff frequency of a feedback circuit between the differential output signals and the differential input signals; and

generating filter capacitance for a low pass filter using a capacitance multiplier circuit.

15. An amplifier circuit, comprising:

a differential amplifier circuit including differential inputs to couple to differential input signals and differential outputs to couple to differential output signals; and

a feedback circuit coupled between the differential outputs and the differential inputs, the feedback circuit including:

a crosspoint control circuit coupled to the differential outputs and including programmably adjustable current sources to cooperatively generate a programmably adjustable crosspoint offset in the differential output signals;

an offset frequency adjustment circuit coupled to the crosspoint control circuit; and

a feedback amplifier circuit coupled to the offset frequency adjustment circuit and the differential inputs.

16. The amplifier circuit of claim 15 , wherein the offset frequency adjustment circuit includes a variable resistance network configured to generate a programmably adjustable cutoff frequency of the feedback circuit.

17. The amplifier circuit of claim 16 , wherein the offset frequency adjustment circuit further includes a resistance control circuit to control the variable resistance network and compensate for process-voltage-temperature (PVT) variations in the variable resistance network.

18. The amplifier circuit of claim 16 , wherein the feedback circuit includes at least one capacitor to at least indirectly couple with each of the differential output signals, each of the at least one capacitor coupled to a capacitance multiplier circuit to generate filter capacitance to determine the programmably adjustable cutoff frequency of the feedback circuit.

Assignments (5)
PATENT RELEASE AND REASSIGNMENT Recorded Jul 5, 2022
From: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
To: II-VI INCORPORATED; MARLOW INDUSTRIES, INC.; EPIWORKS, INC.; LIGHTSMYTH TECHNOLOGIES, INC.; KAILIGHT PHOTONICS, INC.; COADNA PHOTONICS, INC.; OPTIUM CORPORATION; FINISAR CORPORATION; II-VI OPTICAL SYSTEMS, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; II-VI DELAWARE, INC.; II-VI OPTOELECTRONIC DEVICES, INC.; PHOTOP TECHNOLOGIES, INC.
Reel/Frame 060574/0001 →
SECURITY INTEREST Recorded Jul 1, 2022
From: II-VI INCORPORATED; II-VI DELAWARE, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; PHOTOP TECHNOLOGIES, INC.; COHERENT, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 060562/0254 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2020
From: FINISAR CORPORATION
To: II-VI DELAWARE, INC.
Reel/Frame 052286/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 17, 2019
From: RAY, SAGAR
To: FINISAR CORPORATION
Reel/Frame 050748/0577 →
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded Sep 25, 2019
From: II-VI INCORPORATED; MARLOW INDUSTRIES, INC.; EPIWORKS, INC.; LIGHTSMYTH TECHNOLOGIES, INC.; KAILIGHT PHOTONICS, INC.; COADNA PHOTONICS, INC.; OPTIUM CORPORATION; FINISAR CORPORATION; II-VI OPTICAL SYSTEMS, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; II-VI DELAWARE, INC.; II-VI OPTOELECTRONIC DEVICES, INC.; PHOTOP TECHNOLOGIES, INC.
To: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 050484/0204 →