IP Library Granted Patent US 11,073,896
Granted Patent B2
US 11,073,896 · App. 16/174,959 · Granted Jul 27, 2021

Storage device and a power control method for storage device

Inventors: Mitsuru Anazawa (Sagamihara Kanagawa, JP); Norikazu Yoshida (Kawasaki Kanagawa, JP); Takashi Yamaguchi (Yokohama Kanagawa, JP)
Assignee: TOSHIBA MEMORY CORPORATION
G06F1/3287G06F1/28G06F3/068G06F3/0625G06F3/0634
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Quick Facts
Patent No.
US 11,073,896
App. No.
16/174,959
Granted
Jul 27, 2021
Kind
B2
Abstract

A storage device comprises a nonvolatile memory, a controller that controls access to the nonvolatile memory, and a power circuit that supplies power to the nonvolatile memory and the controller. The power circuit can control the supply of power to at least parts of the nonvolatile memory and at least parts of the controller. The controller executes a data save process when a sleep transition request is received from the host requesting at least one of a plurality of sleep states according to a requested sleep state of the sleep transition request. The controller provides the host with state transition determination information that includes at one of a power consumption amount for a transition to a sleep state from an idle state and power consumption amount for a transition from the sleep state to the idle state.

Claims (32)

1. A storage device, comprising:

a nonvolatile memory;

a controller configured to control access to the nonvolatile memory; and

a power circuit configured to supply power to the nonvolatile memory and the controller, and turn on or off the supply of power to at least parts of the nonvolatile memory and at least parts of the controller, wherein

the controller is further configured to:

execute a save process for data when a sleep transition request is received requesting at least one of a plurality of sleep states, the save process being executed according to a requested sleep state of the sleep transition request, and

notify a host of first information that includes at least one of a power consumption amount for a transition to a first sleep state from an idle state and a power consumption amount for a transition from the first sleep state to the idle state, the first sleep state being a sleep state among the plurality of sleep states, and

the first information includes a time length of the first sleep state for which total power consumption amount including at least one of the power consumption amount for the transition to the first sleep state from the idle state and the power consumption amount for the transition from the first sleep state to the idle state is less than power consumption amount for maintaining the idle state for the time length.

2. The storage device according to claim 1 , wherein, when the save process for the data ends, the power circuit stops the supply of the power to a part of the controller or the nonvolatile memory according to the requested sleep state.

3. The storage device according to claim 1 , wherein the first information further includes the time length of the first sleep state for which a total power consumption amount is less than a total power consumption amount of a second sleep state, with the total power consumption amounts including power amount consumed by transitions from the idle state to the respective first or second sleep state and transitions from the respective first or second sleep state to the idle state, the second sleep state being another sleep state among the plurality of sleep states.

4. The storage device according to claim 1 , wherein the controller is configured to notify the host of the first information upon initialization of the controller.

5. The storage device according to claim 1 , wherein the controller is configured to send the host the first information when the save process for the data is executed according to the sleep transition request.

6. The storage device according to claim 1 , further comprising:

a storage unit in the controller; and

a volatile memory connected to the controller, wherein

when the requested sleep state is a shallow sleep state, data in the storage unit is transferred to the volatile memory and power to at least a part of the non-volatile memory and the storage unit is turned off from the power circuit, and

when the requested sleep state is a deep sleep state, data in the storage unit and the volatile memory is stored in the non-volatile memory, and power to at least a part of the non-volatile memory, the volatile memory, and the storage unit is turned off from the power circuit.

7. A power control method for a storage device including a nonvolatile memory, a controller controlling access to the nonvolatile memory, and a power circuit for switching ON and OFF of supply of power to the nonvolatile memory and the controller, the method comprising:

sending a host connected to the storage device first information that includes information related to at least one of a power consumption amount in an idle state of the storage device or power consumption amounts for transitions to and from the idle state for each sleep state among a plurality of sleep states of the storage device;

receiving an access request for the nonvolatile memory or a sleep transition request for requesting transition to a requested sleep state from among the plurality of sleep states;

executing a save process according to the requested sleep state when the sleep transition request is received; and

stopping the supply of the power to at least a part of the controller or the nonvolatile memory in response to the requested sleep state after the save process for the data ends, wherein

the host schedules access requests and sleep transition requests according to the first information, and

the first information includes a time length for a first sleep state for which the power consumption amount is less than the power consumption amount in the idle state.

8. The power control method according to claim 7 , wherein the first information includes a time length for a first sleep state for which the power consumption amount is less than the power consumption amount in the idle state.

9. The power control method according to claim 7 , wherein the first information includes a time length of the first sleep state for which total power consumption amount including the power consumption amount for the transition to the first sleep state from the idle state and the power consumption amount for the transition from the first sleep state to the idle state is less than power consumption amount for maintaining the idle state.

10. The power control method according to claim 9 , wherein the first information further includes a time length of the first sleep state for which a total power consumption amount is less than a total power consumption amount of a second sleep state, with the total power consumption amounts including power amount consumed by transitions from the idle state to the respective first or second sleep state and transitions from the respective first or second sleep state to the idle state, the second sleep state being a sleep state among the plurality of sleep states of the storage device.

11. The power control method according to claim 7 , wherein the first information is sent to the host upon initialization of the storage device.

12. The power control method according to claim 7 , wherein the first information is sent to the host when the save process is executed according to the sleep transition request.

13. The power control method according to claim 7 , further comprising:

receiving process recommendation notification from the host indicating that a background process can be executed by the controller; and

executing the background process after the process recommendation notification is received.

Assignments (2)
CHANGE OF NAME AND ADDRESS Recorded Jan 31, 2022
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 058905/0582 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 30, 2018
From: ANAZAWA, MITSURU; YOSHIDA, NORIKAZU; YAMAGUCHI, TAKASHI
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 047357/0413 →