Detector quench circuit for lidar system comprising a discrete transistor to draw a quench current to enable a drop in a reverse bias voltage applied to an avalanche photodiode
A circuit for quenching an avalanche photodiode (APD) detector is disclosed herein. The circuit may comprise a discrete transistor configured to draw a quench current so as to enable a drop in a reverse bias voltage applied to the APD detector, and an integrated circuit connected to the discrete transistor, the integrated circuit including a plurality of circuit elements for controlling the reverse bias voltage.
1. A circuit for quenching an avalanche photodiode (APD) detector, the circuit comprising:
a discrete transistor configured to draw a quench current so as to enable a drop in a reverse bias voltage applied to the APD detector; and
an integrated circuit connected to the discrete transistor, the integrated circuit including a plurality of circuit elements for controlling the reverse bias voltage.
2. The circuit of claim 1 , wherein the integrated circuit further comprises a plurality of comparators, wherein the output of each comparator is connected to an input channel of a time-to-digital converter.
3. The circuit of claim 1 , wherein the discrete transistor is connected to the integrated circuit via wire bonding.
4. The circuit of claim 1 , wherein the discrete transistor is connected to the integrated circuit via bump bonding.
5. The circuit of claim 1 , wherein the integrated circuit includes a first comparator configured to determine when a detected optical pulse has exceeded a jamming threshold.
6. The circuit of claim 5 , wherein the jamming threshold is set to avoid damage to the APD detector.
7. The circuit of claim 5 , wherein the circuit is configured to quench the APD detector when the jamming threshold is exceeded.
8. The circuit of claim 7 , wherein the circuit is configured to quench the APD detector within 10 ns.
9. The circuit of claim 8 , wherein the circuit is configured to quench the APD detector within 1 ns.
10. The circuit of claim 5 , wherein an output of the first comparator is latched in an active state when the detected optical pulse has exceeded the jamming threshold.
11. The circuit of claim 5 , wherein the first comparator causes the discrete transistor to draw the quench current when the detected optical pulse has exceeded the jamming threshold.
12. The circuit of claim 1 , wherein the discrete transistor is connected to a reverse bias voltage source via a resistor.
13. The circuit of claim 12 , wherein the drop in the reverse bias voltage is across the resistor.
14. The circuit of claim 13 , wherein a capacitor is connected to the resistor to reduce noise created by the resistor.
15. The circuit of claim 1 , wherein the integrated circuit includes a resistor network and a second comparator, the resistor network being configured to sense the reverse bias voltage applied to the APD detector and to provide a reduced version of the reverse bias voltage to the second comparator.
16. The circuit of claim 15 , wherein the second comparator causes the discrete transistor to cease drawing the quench current when the reverse bias voltage drops below a threshold value.