IP Library Granted Patent US 10,827,191
Granted Patent B2
US 10,827,191 · App. 16/179,472 · Granted Nov 3, 2020

Parallel coding of syntax elements for JPEG accelerator

Inventors: Abhishek Kumar Dikshit (Fremont, CA); Jorge Cruz-Rios (Los Altos, CA); Rajan Goyal (Saratoga, CA); Satyanarayana Lakshmipathi Billa (Sunnyvale, CA)
Assignee: Fungible, Inc.
H04N19/436H04N19/129H04N19/14H04N19/176H04N19/70
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Quick Facts
Patent No.
US 10,827,191
App. No.
16/179,472
Granted
Nov 3, 2020
Kind
B2
Abstract

A device includes a memory configured to store image data and an image coding unit implemented in circuitry. The image coding unit is configured to code a first value of a first instance of a first syntax element of a first block of image data and determine a first context for coding a second value of a second instance of the first syntax element of a second block of the image data. The image coding unit is configured to context-based code the second value of the second instance of the first syntax element of the second block of the image data after coding the first value of the first instance of the first syntax element using the first context and code a third value of a first instance of a second syntax element of the first block in parallel with coding the second value or after coding the second value.

Claims (85)

1. A method comprising:

coding, by an image coding unit implemented in circuitry of a device, a first value of a first instance of a first syntax element of a first block of image data;

determining, by the image coding unit, a first context for coding a second value of a second instance of the first syntax element of a second block of the image data;

context-based coding, by the image coding unit, using the first context for coding the second value of the second instance of the first syntax element of the second block of the image data, the second value of the second instance of the first syntax element of the second block of the image data after coding the first value of the first instance of the first syntax element; and

coding, by the image coding unit, a third value of a first instance of a second syntax element of the first block in parallel with coding the second value or after coding the second value.

2. The method of claim 1 , wherein the first syntax element comprises a last-non-zero (LNZ) high syntax element, and wherein the second syntax element comprises one or more of a non-zero alternating current (AC) high values syntax element, an LNZ low syntax element, an AC low coefficient map syntax element, a non-zero AC low values syntax element, or a direct current (DC) coefficient syntax element.

3. The method of claim 2 ,

wherein the first value for the first instance of the LNZ high syntax element and a fourth value for a first instance of the LNZ low syntax element of the first block represent a first position of a first last-non-zero coefficient in zig-zag scan order of the first block, and

wherein the second value for the second instance of the LNZ high syntax element and a fifth value for a second instance of the LNZ low syntax element of the second block represent a second position of a second last-non-zero coefficient in the zig-zag scan order of the second block.

4. The method of claim 3 , further comprising:

abstaining, by the image coding unit, from coding data for coefficients of the first block following the first last-non-zero coefficient in the zig-zag scan order; and

abstaining, by the image coding unit, from coding data for coefficients of the second block following the second last-non-zero coefficient in the zig-zag scan order.

5. The method of claim 3 , further comprising:

calculating, by the image coding unit, a sixth value for a first instance of a number of non-zero coefficients (NNZ) value for the first block using the first position of the first last-non-zero coefficient; and

calculating, by the image coding unit, a seventh value for a second instance of the NNZ value for the second block using the second position of the second last-non-zero coefficient.

6. The method of claim 5 , further comprising:

coding, by the image coding unit, data for coefficients of the first block preceding the first last-non-zero coefficient in the zig-zag scan order according to contexts determined according to the sixth value for the first instance of the NNZ value; and

coding, by the image coding unit, data for coefficients of the second block preceding the second last-non-zero coefficient in the zig-zag scan order according to contexts determined according to the seventh value for the second instance of the NNZ value.

7. The method of claim 3 , further comprising:

coding, by the image coding unit, data for coefficients of the first block preceding the first last-non-zero coefficient in the zig-zag scan order according to contexts determined according to distances between positions of the coefficients of the first block and the first position of the first last-non-zero coefficient; and

coding, by the image coding unit, data for coefficients of the second block preceding the second last-non-zero coefficient in the zig-zag scan order according to contexts determined according to distances between positions of the coefficients of the second block and the second position of the second last-non-zero coefficient.

8. The method of claim 7 ,

wherein coding the data for the coefficients of the first block comprises coding the data for the coefficients of the first block in parallel, and

wherein coding the data for the coefficients of the second block comprises coding the data for the coefficients of the second block in parallel.

9. The method of claim 7 ,

wherein coding the data for the coefficients of the first block comprises coding coefficient map values for the coefficients of the first block, and

wherein coding the data for the coefficients of the second block comprises coding coefficient map values for the coefficients of the second block.

10. The method of claim 1 , wherein the first syntax element comprises a non-zero alternating current (AC) high values syntax element, and wherein the second syntax element comprises one or more of an AC low coefficient map syntax element, a non-zero AC low values syntax element, or a direct current (DC) coefficient syntax element.

11. The method of claim 1 , further comprising:

maintaining, by the image coding unit, a context block pointer that points to data for the first block in a memory of the device; and

maintaining, by the image coding unit, a current block pointer that points to data for the second block in the memory.

12. The method of claim 1 ,

wherein coding the first value comprises encoding the first value;

wherein coding the second value comprises encoding the second value; and

wherein coding the third value comprises encoding the third value.

13. The method of claim 1 ,

wherein coding the first value comprises decoding the first value;

wherein coding the second value comprises decoding the second value; and

wherein coding the third value comprises decoding the third value.

14. A device comprising:

a memory configured to store image data; and

an image coding unit implemented in circuitry, the image coding unit being configured to:

code a first value of a first instance of a first syntax element of a first block of the image data;

determine a first context for coding a second value of a second instance of the first syntax element of a second block of the image data;

context-based code, using the first context for coding the second value of the second instance of the first syntax element of the second block of the image data, the second value of the second instance of the first syntax element of the second block of the image data after coding the first value of the first instance of the first syntax element; and

code a third value of a first instance of a second syntax element of the first block in parallel with coding the second value or after coding the second value.

15. The device of claim 14 , wherein the first syntax element comprises a last-non-zero (LNZ) high syntax element, and wherein the second syntax element comprises one or more of a non-zero alternating current (AC) high values syntax element, an LNZ low syntax element, an AC low coefficient map syntax element, a non-zero AC low values syntax element, or a direct current (DC) coefficient syntax element.

16. The device of claim 15 ,

wherein the first value for the first instance of the LNZ high syntax element and a fourth value for a first instance of the LNZ low syntax element of the first block represent a first position of a first last-non-zero coefficient in zig-zag scan order of the first block, and

wherein the second value for the second instance of the LNZ high syntax element and a fifth value for a second instance of the LNZ low syntax element of the second block represent a second position of a second last-non-zero coefficient in the zig-zag scan order of the second block.

17. The device of claim 16 , wherein the coding unit is configured to:

abstain from coding data for coefficients of the first block following the first last-non-zero coefficient in the zig-zag scan order; and

abstain from coding data for coefficients of the second block following the second last-non-zero coefficient in the zig-zag scan order.

18. The device of claim 16 , wherein the coding unit is configured to:

calculate a sixth value for a first instance of a number of non-zero coefficients (NNZ) value for the first block using the first position of the first last-non-zero coefficient; and

calculate a seventh value for a second instance of the NNZ value for the second block using the second position of the second last-non-zero coefficient.

19. The device of claim 18 , wherein the coding unit is configured to:

code data for coefficients of the first block preceding the first last-non-zero coefficient in the zig-zag scan order according to contexts determined according to the sixth value for the first instance of the NNZ value; and

code data for coefficients of the second block preceding the second last-non-zero coefficient in the zig-zag scan order according to contexts determined according to the seventh value for the second instance of the NNZ value.

20. The device of claim 16 , wherein the coding unit is configured to:

code data for coefficients of the first block preceding the first last-non-zero coefficient in the zig-zag scan order according to contexts determined according to distances between positions of the coefficients of the first block and the first position of the first last-non-zero coefficient; and

code data for coefficients of the second block preceding the second last-non-zero coefficient in the zig-zag scan order according to contexts determined according to distances between positions of the coefficients of the second block and the second position of the second last-non-zero coefficient.

21. The device of claim 20 ,

wherein, to code the data for the coefficients of the first block, the coding unit is configured to code the data for the coefficients of the first block in parallel, and

wherein, to code the data for the coefficients of the second block, the coding unit is configured to code the data for the coefficients of the second block in parallel.

22. The device of claim 20 ,

wherein, to code the data for the coefficients of the first block, the coding unit is configured to code coefficient map values for the coefficients of the first block, and

wherein, to code the data for the coefficients of the second block, the coding unit is configured to code coefficient map values for the coefficients of the second block.

23. The device of claim 14 , wherein the first syntax element comprises a non-zero alternating current (AC) high values syntax element, and wherein the second syntax element comprises one or more of an AC low coefficient map syntax element, a non-zero AC low values syntax element, or a direct current (DC) coefficient syntax element.

24. The device of claim 14 , wherein the coding unit is configured to:

maintain a context block pointer that points to data for the first block in a memory of the device; and

maintain a current block pointer that points to data for the second block in the memory.

25. The device of claim 14 ,

wherein, to code the first value, the coding unit is configured to encode the first value;

wherein, to code the second value, the coding unit is configured to encode the second value; and

wherein, to code the third value, the coding unit is configured to encode the third value.

26. The device of claim 14 ,

wherein, to code the first value, the coding unit is configured to decode the first value;

wherein, to code the second value, the coding unit is configured to decode the second value; and

wherein, to code the third value, the coding unit is configured to decode the third value.

27. A non-transitory computer-readable storage medium comprising instructions that, when executed, cause a processor to:

code a first value of a first instance of a first syntax element of a first block of image data;

determine a first context for coding a second value of a second instance of the first syntax element of a second block of the image data;

context-based code, using the first context for coding the second value of the second instance of the first syntax element of the second block of the image data, the second value of the second instance of the first syntax element of the second block of the image data after coding the first value of the first instance of the first syntax element; and

code a third value of a first instance of a second syntax element of the first block in parallel with coding the second value or after coding the second value.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 31, 2023
From: FUNGIBLE, INC.
To: MICROSOFT TECHNOLOGY LICENSING, LLC
Reel/Frame 064434/0430 →
RELEASE OF SECURITY INTEREST Recorded Jan 9, 2023
From: HERCULES CAPITAL, INC., AS AGENT
To: FUNGIBLE, INC.
Reel/Frame 062335/0803 →
RELEASE OF SECURITY INTEREST Recorded Jan 5, 2023
From: SILICON VALLEY BANK
To: FUNGIBLE, INC.
Reel/Frame 062308/0191 →
SECURITY INTEREST Recorded Dec 16, 2021
From: FUNGIBLE, INC.
To: SILICON VALLEY BANK
Reel/Frame 058523/0960 →
SECURITY INTEREST Recorded Dec 16, 2021
From: FUNGIBLE, INC.
To: HERCULES CAPITAL, INC., AS AGENT
Reel/Frame 058533/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 28, 2019
From: DIKSHIT, ABHISHEK KUMAR; CRUZ-RIOS, JORGE; GOYAL, RAJAN; BILLA, SATYANARAYANA LAKSHMIPATHI
To: FUNGIBLE, INC.
Reel/Frame 048470/0802 →
Continuity (1)
Related Publication 20200145680A1 · May 7, 2020