IP Library Granted Patent US 10,790,353
Granted Patent B2
US 10,790,353 · App. 16/185,610 · Granted Sep 29, 2020

Semiconductor device with superjunction and oxygen inserted Si-layers

Inventors: Martin Poelzl (Ossiach, AT); Robert Haase (San Pedro, CA); Sylvain Leomant (Poertschach am Woerthersee, AT); Maximilian Roesch (St. Magdalen, AT); Ravi Keshav Joshi (Klagenfurt, AT); Andreas Meiser (Sauerlach, DE); Xiaoqiu Huang (Plano, TX); Ling Ma (Redondo Beach, CA)
Assignee: Infineon Technologies Austria AG
H01L29/0634H01L29/0696H01L29/0865H01L29/0882H01L29/1095H01L29/4236H01L29/66734H01L29/7397H01L29/7813
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Quick Facts
Patent No.
US 10,790,353
App. No.
16/185,610
Granted
Sep 29, 2020
Kind
B2
Abstract

A semiconductor device includes a source region and a drain region of a first conductivity type, a body region of a second conductivity type between the source region and the drain region, a gate configured to control current through a channel of the body region, a drift zone of the first conductivity type between the body region and the drain region, a superjunction structure formed by a plurality of regions of the second conductivity type laterally spaced apart from one another by intervening regions of the drift zone, and a diffusion barrier structure disposed along sidewalls of the regions of the second conductivity type of the superjunction structure. The diffusion barrier structure includes alternating layers of Si and oxygen-doped Si and a Si capping layer on the alternating layers of Si and oxygen-doped Si.

Claims (40)

1. A method of manufacturing a semiconductor device, the method comprising:

forming a source region and a drain region of a first conductivity type;

forming a body region of a second conductivity type, wherein the body region is disposed between the source region and the drain region;

forming a gate configured to control current through a channel of the body region;

forming a drift zone of the first conductivity type, wherein the drift zone is disposed between the body region and the drain region;

forming a plurality of regions of the second conductivity type laterally spaced apart from one another by intervening regions of the drift zone, to form a superjunction structure; and

forming a diffusion barrier structure along sidewalls of the regions of the second conductivity type of the superjunction structure, the diffusion barrier structure comprising alternating layers of Si and oxygen-doped Si and a Si capping layer on the alternating layers of Si and oxygen-doped Si.

2. The method of claim 1 , wherein forming the plurality of regions of the second conductivity type and forming the diffusion barrier structure along sidewalls of the regions of the second conductivity type comprises:

etching a plurality of trenches in a first Si epitaxial layer of the first conductivity type, wherein the first Si epitaxial layer includes the drift zone;

epitaxially growing the alternating layers of Si and oxygen-doped Si on sidewalls and a bottom of the trenches;

epitaxially growing the Si capping layer on the alternating layers of Si and oxygen-doped Si; and

after forming the diffusion barrier structure, filling the trenches with epitaxial Si of the second conductivity type.

3. The method of claim 2 , wherein forming the source region and the body region comprises:

after filling the trenches with the epitaxial Si of the second conductivity type, forming a second Si epitaxial layer over the first Si epitaxial layer;

implanting dopant species of the first conductivity type into a first part of the second Si epitaxial layer which corresponds to the source region;

implanting dopant species of the second conductivity type into a second part of the second Si epitaxial layer which corresponds to the body region; and

annealing the second Si epitaxial layer to activate the implanted dopant species of the first conductivity type to form the source region and to activate the implanted dopant species of the second conductivity type to form the body region.

4. The method of claim 3 , wherein the drain region is disposed in a Si substrate over which the first Si epitaxial layer is formed.

5. The method of claim 3 , wherein the second Si epitaxial layer is annealed in a temperature range above 1000° C. for 30 minutes or less.

6. The method of claim 3 , further comprising:

planarizing the epitaxial Si of the second conductivity type before forming the second Si epitaxial layer.

7. The method of claim 3 , further comprising:

etching a contact trench into the second Si epitaxial layer, the contact trench exposing a sidewall of the source region and a top surface of the body region; and

filling the contact trench with an electrically conductive material which contacts the sidewall of the source region and the top surface of the body region.

8. The method of claim 7 , wherein etching the contact trench further comprises:

etching the contact trench into the first Si epitaxial layer to expose a sidewall of the first Si epitaxial layer;

depositing an insulating material on the sidewall of the body region and the sidewall of the first Si epitaxial layer; and

etching the contact trench into a region of the plurality of regions of the second conductivity type,

wherein the electrically conductive material is in contact with the region of the second conductivity type into which the contact trench is etched,

wherein sidewalls of the electrically conductive material are laterally separated from the second Si epitaxial layer and the first Si epitaxial layer by the insulating material.

9. The method of claim 2 , further comprising:

removing the alternating layers of Si and oxygen-doped Si and the Si capping layer from the bottom of the plurality of trenches before filling the plurality of trenches with the epitaxial Si of the second conductivity type, so that the bottom of the plurality of trenches is uncovered when the plurality of trenches is filled with the epitaxial Si of the second conductivity type.

10. The method of claim 2 , wherein filling the plurality of trenches with the epitaxial Si of the second conductivity type comprises:

selectively growing in situ doped epitaxial Si of the second conductivity type in the plurality of trenches; and

planarizing the in situ doped epitaxial Si of the second conductivity type before forming the second Si epitaxial layer.

11. The method of claim 2 , wherein filling the plurality of trenches with the epitaxial Si of the second conductivity type comprises:

selectively growing epitaxial Si in the plurality of trenches;

planarizing the epitaxial Si;

implanting dopant species of the second conductivity type into the planarized epitaxial Si; and

annealing the first Si epitaxial layer to activate the implanted dopant species of the second conductivity type.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2020
From: INFINEON TECHNOLOGIES AMERICAS CORP.
To: INFINEON TECHNOLOGIES AUSTRIA AG
Reel/Frame 053033/0077 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2019
From: HAASE, ROBERT; HUANG, XIAOQIU; MA, LING
To: INFINEON TECHNOLOGIES AMERICAS CORP.
Reel/Frame 051391/0520 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2019
From: POELZL, MARTIN; LEOMANT, SYLVAIN; ROESCH, MAXIMILIAN; JOSHI, RAVI KESHAV; MEISER, ANDREAS
To: INFINEON TECHNOLOGIES AUSTRIA AG
Reel/Frame 051391/0567 →
Continuity (1)
Related Publication 20200152733A1 · May 14, 2020