Fast boot
Initializing a computing system using dormant pages includes marking a set of guest physical addresses as dormant. It further includes, for each node in a plurality of physical nodes, designating a set of real physical addresses for zeroing. An operating system is executing collectively across the physical nodes.
1. A computer system, comprising:
a plurality of physical nodes, wherein an operating system is executing collectively across the plurality of physical nodes;
wherein a set of guest physical addresses is marked as dormant; and
wherein, for each node in the plurality, a set of real physical addresses is designated for zeroing.
2. The computer system of claim 1 , wherein the set of guest physical addresses marked as dormant are initially located on a first node in the plurality of physical nodes.
3. The computer system of claim 1 , wherein each node in the plurality comprises a list of real physical addresses to be zeroed.
4. The computer system of claim 3 , wherein a portion of physical memory corresponding to a real physical address in the list of real physical addresses to be zeroed is allocated and zeroed.
5. The computer system of claim 4 , wherein subsequent to the allocation and zeroing of the is portion of physical memory corresponding to the real physical address, the real physical address is removed from the list of real physical addresses to be zeroed, and wherein the real physical address is included in a list of real physical addresses that have been zeroed.
6. The computer system of claim 4 , wherein the portion of physical memory is allocated and zeroed on-demand.
7. A computer system, comprising:
a plurality of physical nodes, wherein an operating system is executing collectively across the plurality of physical nodes;
wherein an indication of a stall on a guest physical address marked as dormant is received at a first node in the plurality;
wherein an available portion of physical memory is obtained; and
wherein the guest physical address is mapped to the obtained available portion of physical memory.
8. The computer system of claim 7 , wherein obtaining the available portion of physical memory comprises checking a list of real physical addresses local to the first node that have been zeroed.
9. The computer system of claim 8 , wherein obtaining the available portion of physical memory comprises obtaining a portion of physical memory corresponding to a real physical address in the list of real physical addresses that have been zeroed.
10. The computer system of claim 9 , wherein the real physical address is removed from the list of real physical addresses that have been zeroed.
11. The computer system of claim 7 , wherein obtaining the available portion of physical memory comprises checking a list of real physical addresses local to the first node that are to be to zeroed.
12. The computer system of claim 11 , wherein obtaining the available portion of physical memory comprises allocating a portion of physical memory corresponding to a real physical address in the list of real physical addresses local to the first node that are to be zeroed, wherein the allocated portion of physical memory is zeroed.
13. The computer system of claim 7 , wherein a virtualized processor associated with the stall is migrated to another node in the plurality that has local memory that is available to be mapped to the guest physical address.
14. A computer system, comprising:
a plurality of physical nodes, wherein an operating system is executing collectively across the plurality of physical nodes;
wherein an instruction to zero a portion of memory associated with a guest physical address is detected;
wherein the guest physical address is marked as dormant; and
wherein the instruction to zero the portion of memory is skipped.
15. The computer system of claim 14 , wherein a portion of physical memory is unmapped from the guest physical address marked as dormant.
16. The computer system of claim 15 , wherein the portion of physical memory is included in a list of portions of physical memory to be zeroed.
17. The computer system of claim 14 , wherein the instruction is detected at a first node in the plurality of physical nodes, and wherein the guest physical address is defined on a second node.
18. The computer system of claim 17 , wherein a message is sent from the first node to the second node indicating that the guest physical address is to be marked as dormant.
19. The computer system of claim 17 , wherein ownership of the guest physical address is transferred from the second node to the first node, and wherein subsequent to the transfer, the guest physical address is marked as dormant.
20. The computer system of claim 19 , wherein the guest physical address is unmapped from the second node.