IP Library Granted Patent US 10,931,492
Granted Patent B2
US 10,931,492 · App. 16/192,092 · Granted Feb 23, 2021

Two-tone in-phase pi/2 binary phase-shift keying communication

Inventor: Gustav Gerald Vos (Surrey, CA)
Assignee: Sierra Wireless, Inc.
H04L27/2636H04L5/0053H04L27/2628H04L27/3444H04L5/0007H04L27/2614
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Quick Facts
Patent No.
US 10,931,492
App. No.
16/192,092
Granted
Feb 23, 2021
Kind
B2
Abstract

A method and apparatus for communication, e.g. in an LTE system, that uses two tones with an in-phase pi/2 BPSK modulation with single carrier frequency-division multiple access (SC-FDMA). Pairs of input bits are converted to symbols using pi/2 BPSK, with each one of the pair of bits converted using a same symbol constellation, and successive pairs of bits converted using alternatingly different symbol constellations. The two constellations may be identical after a pi/2 radian rotation. Pairs of symbols corresponding to pairwise converted bits may be treated as the symbols for a pair of tones of a subsequent SC-FDMA, OFDMA, or similar processing operation.

Claims (41)

1. A method for communicating data from a transmitting device, the method comprising:

receiving binary input data;

converting pairs of bits of the binary input data into corresponding pairs of modulation symbols using in-phase pi/2 binary phase-shift keying (BPSK), both bits of each pair of bits being converted to modulation symbols using a same symbol constellation; and

presenting pairs of modulation symbols for further processing prior to transmission, wherein successive pairs of modulation symbols are generated from corresponding successive pairs of bits, the further processing is performed concurrently on each pair of modulation symbols, and the further processing comprises processing the modulation symbols for transmission using a multiple access transmission scheme.

2. The method of claim 1 , wherein successive pairs of bits are alternatingly converted to modulation symbols using alternatingly different symbol constellations.

3. The method of claim 2 , wherein the different symbol constellations comprise a first symbol constellation consisting of points {re iθ ,re i(θ+π) } and a second symbol constellation consisting of points {re i(θ+π/2) ,re i(θ−π/2) }, wherein r is a predetermined magnitude value and θ is a predetermined phase offset value.

4. The method of claim 1 , wherein the further processing comprises Single Carrier Frequency Division Multiple Access (SC-FDMA) processing of symbols for transmission.

5. The method of claim 1 , wherein the further processing comprises Orthogonal Frequency Division Multiple Access (OFDMA) processing of symbols for transmission.

6. The method of claim 1 , wherein the further processing comprises sub-Physical Resource Block (sub-PRB) modulation.

7. The method of claim 1 , wherein the further processing comprises handling the pairs of modulation symbols as modulation symbols mapped to a pair of respective tones to be transmitted using a corresponding pair of subcarriers of a Physical Resource Block comprising the pair of subcarriers along with additional subcarriers.

8. The method of claim 1 , further comprising performing a Discrete Fourier Transform (DFT) operation on each successive pair of modulation symbols, the DFT operation following or integrated with the converting of pairs of bits into corresponding pairs of modulation symbols.

9. The method of claim 8 , wherein the DFT operation is performed as part of SC-FDMA processing of the pairs of modulation symbols.

10. The method of claim 1 , further comprising performing the further processing, wherein the further processing comprises one or more of:

performing a Discrete Fourier Transform (DFT) on each pair of modulation symbols;

mapping of generated pairs of symbols from a DFT operation to a plurality of subcarriers of a Physical Resource Block (PRB);

performing an inverse Discrete Fourier Transform (iDFT) on concurrent sets of symbols;

transmission filtering of concurrent sets of symbols; and

wirelessly transmitting symbols representing the binary input data.

11. An apparatus for communicating data, the apparatus comprising electronic circuitry configured to:

receive binary input data;

convert pairs of bits of the binary input data into corresponding pairs of modulation symbols using in-phase pi/2 binary phase-shift keying (BPSK), both bits of each pair of bits being converted to modulation symbols using a same symbol constellation; and

provide pairs of modulation symbols for further processing prior to transmission, wherein successive pairs of modulation symbols are generated from corresponding successive pairs of bits, the further processing is performed concurrently on each pair of modulation symbols, and the further processing comprises processing the modulation symbols for transmission using a multiple access transmission scheme.

12. The apparatus of claim 11 , wherein the apparatus is configured to convert pairs of bits of the binary input data into corresponding pairs of modulation symbols by: alternatingly converting successive pairs of bits to modulation symbols using alternatingly different symbol constellations.

13. The apparatus of claim 12 , wherein the different symbol constellations comprise a first symbol constellation consisting of points {re iθ ,re i(θ+π)} and a second symbol constellation consisting of points {re i(θ+π/2) ,re i(θ−π/2) }, wherein r is a predetermined magnitude value and θ is a predetermined phase offset value.

14. The apparatus of claim 11 , wherein the electronic circuitry comprises:

a pair of synchronized pi/2 BPSK bit-to-symbol converters operating in parallel to convert different respective bits of each of the pairs of bits into different respective symbols of each of the pairs of modulation symbols.

15. The apparatus of claim 11 , wherein the electronic circuitry comprises:

a pi/2 BPSK bit-to-symbol converter configured to convert each bit of each of the pairs of bits into respective symbols of each of the pairs of modulation symbols.

16. The apparatus of claim 11 , wherein the electronic circuitry comprises a splitter circuit configured to assign different respective bits of each of the pairs of bits to different tones prior to bit-to-symbol conversion, or to assign different respective symbols of each of the pairs of modulation symbols to different tones following bit-to-symbol conversion, the tones to be transmitted using a corresponding pair of subcarriers of a Physical Resource Block comprising the pair of subcarriers along with additional sub carriers.

17. The apparatus of claim 11 , wherein the electronic circuitry comprises a combination two-tone pi/2 BPSK bit-to-symbol converter and discrete Fourier transform (DFT) converter configured to directly map the pairs of bits to frequency domain representations of the corresponding pairs of modulation symbols in a single operation.

18. The apparatus of claim 11 , wherein the further processing comprises Single Carrier Frequency Division Multiple Access (SC-FDMA) processing of symbols for transmission.

19. The apparatus of claim 11 , wherein the further processing comprises sub-Physical Resource Block (sub-PRB) modulation.

20. The apparatus of claim 11 , wherein the further processing comprises handling the pairs of modulation symbols as modulation symbols mapped to a pair of respective tones to be transmitted using a corresponding pair of subcarriers of a Physical Resource Block comprising the pair of subcarriers along with additional subcarriers.

21. The apparatus of claim 11 , wherein the electronic circuitry is further configured to perform a Discrete Fourier Transform (DFT) operation on each successive pair of modulation symbols, the DFT operation following or integrated with the converting of pairs of bits into corresponding pairs of modulation symbols.

22. The apparatus of claim 21 , wherein the DFT operation is performed as part of SC-FDMA processing of the pairs of modulation symbols.

23. The apparatus of claim 11 , wherein the electronic circuitry is further configured to perform the further processing, wherein the further processing comprises one or more of:

performing a Discrete Fourier Transform (DFT) on each pair of modulation symbols;

mapping of generated pairs of symbols from a DFT operation to a plurality of subcarriers of a Physical Resource Block (PRB);

performing an inverse Discrete Fourier Transform (iDFT) on concurrent sets of symbols;

transmission filtering of concurrent sets of symbols; and

wirelessly transmitting symbols representing the binary input data.

Assignments (8)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 28, 2023
From: SIERRA WIRELESS, INC.
To: SEMTECH CORPORATION
Reel/Frame 062886/0528 →
CHANGE OF NAME Recorded Feb 28, 2023
From: SIERRA WIRELESS, INC.
To: SIERRA WIRELESS, ULC
Reel/Frame 062886/0422 →
MERGER AND CHANGE OF NAME Recorded Feb 28, 2023
From: SIERRA WIRELESS, ULC; 4462475 NOVA SCOTIA LIMITED; SIERRA WIRELESS, INC.
To: SIERRA WIRELESS, INC.
Reel/Frame 062886/0492 →
RELEASE OF SECURITY INTEREST Recorded Feb 10, 2023
From: CANADIAN IMPERIAL BANK OF COMMERCE
To: SIERRA WIRELESS AMERICA, INC.; SIERRA WIRELESS, INC.
Reel/Frame 062702/0496 →
RELEASE OF SECURITY INTEREST Recorded Jan 12, 2023
From: CANADIAN IMPERIAL BANK OF COMMERCE
To: SIERRA WIRELESS AMERICA INC.; SIERRA WIRELESS INC.
Reel/Frame 062389/0067 →
SECURITY INTEREST Recorded Mar 16, 2022
From: SIERRA WIRELESS, INC.; SIERRA WIRELESS AMERICA INC.
To: CANADIAN IMPERIAL BANK OF COMMERCE
Reel/Frame 059908/0311 →
SECURITY INTEREST Recorded Feb 25, 2022
From: SIERRA WIRELSS, INC.
To: CANADIAN IMPERIAL BANK OF COMMERCE
Reel/Frame 059250/0448 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 6, 2019
From: VOS, GUSTAV GERALD
To: SIERRA WIRELESS, INC.
Reel/Frame 048255/0215 →