Methods and systems for monitoring the integrity of a GPU
Methods and systems for monitoring the integrity of a graphics processing unit (GPU) are provided. The method comprises the steps of determining a known-good result associated with an operation of the GPU, and generating a test image comprising a test subject using the operation of the GPU, such that the test subject is associated with the known-good result. The test image is written to video memory, and the known-good result is written to system memory. Subsequently, the test subject from the test image is transfered from video memory to system memory. The test subject in the system memory is compared with the known-good result in system memory. If the test subject does not match the known-good result, then a conclusion is drawn that the integrity of the GPU has been compromised.
1. A system for monitoring integrity of a graphics processing unit (GPU), the system comprising:
a GPU engine of the GPU;
a central processing unit (CPU) in communication with the GPU;
a video memory in communication with the CPU and the GPU;
a system memory in communication with the CPU and the GPU; and wherein the CPU is arranged to:
generate an expected sequence number according to a pre-determined sequence,
store the expected sequence number in the system memory, and
instruct the GPU engine to generate a test image that includes the expected sequence number;
the GPU engine is arranged to:
generate the test image according to the instruction from the CPU, and
write the test image to the video memory; and
the CPU is further arranged to:
transfer the test image from the video memory to the system memory,
extract a sequence number from the transferred test image,
compare the extracted sequence number with the expected sequence number, and
write a result to the system memory indicating failure when the comparison indicates that the extracted sequence number does not match the expected sequence number.
2. The system of claim 1 , wherein the system memory is shared by the CPU and the GPU.
3. The system of claim 2 , wherein the system further comprises a graphics application stored in the system memory including application code that is executable by the CPU and structured to cause the CPU to be configured to:
read the result from the system memory;
determine that the integrity monitor module has detected an erroneous GPU operation; and
activate a warning signal without communicating with the GPU.
4. The system of claim 1 , wherein the system further comprises a display controller in communication with the video memory, the CPU and the GPU, and wherein the computer instruction code is further structured to cause the CPU to be configured to:
read a register of a display controller to determine if there is updated data being transmitted from the GPU to the display controller.
5. The system of claim 1 , wherein the test image is located in a non-display region of the video memory.
6. A method of monitoring integrity of a graphics processing unit (GPU) using a central processing unit (CPU) in communication with the GPU, the method comprising:
generating, by the CPU, an expected sequence number in accordance with a pre-determined sequence, storing the expected sequence number in a system memory, and instructing a GPU engine of the GPU to generate a test image that includes the expected sequence number;
generating, by the GPU engine of the GPU, the test image according to the instruction from the CPU, and writing the test image to a video memory; and
transferring, by the CPU, the test image from the video memory to the system memory, extracting a sequence number from the transferred test image, comparing the extracted sequence number with the expected sequence number, and writing a result to the system memory indicating failure when the comparing indicates that the extracted sequence number does not match the expected sequence number.
7. The method of claim 6 , wherein the system memory is shared by the CPU and the GPU.
8. The method of claim 6 , further comprising activating a warning signal if the result is written to system memory indicating failure.
9. The method of claim 8 , wherein the activating the warning signal comprises writing a warning message to a computer display.
10. The method of claim 8 , wherein the activating the warning signal comprises activating an annunciator light.
11. The method of claim 8 , wherein the activating the warning signal comprises activating an alarm sound.
12. The method of claim 6 , wherein the test image is located in a non-display region of the video memory.
13. A non-transitory computer-readable medium system storing computer program code executable by a graphics processing unit (GPU) and a central processing unit (CPU), the computer program code, when executed, structured to cause the GPU and the CPU to be configured to:
generate, by the CPU, an expected sequence number in accordance with a pre-determined sequence, store the expected sequence number in a system memory, and instruct a GPU engine of the GPU to generate a test image that includes the expected sequence number;
generate, by the GPU engine of the GPU, the test image according to the instruction from the CPU, and write the test image to a video memory; and
transfer, by the CPU, the test image from the video memory to the system memory, extract a sequence number from the transferred test image, compare the extracted sequence number with the expected sequence number, and write a result to the system memory indicating failure when the comparing indicates that the extracted sequence number does not match the expected sequence number.