Information handling system and method to detect and recover from no power/no post failures
Embodiments of information handling systems (IHSs) and methods are provided herein to automatically detect and recover from boot failures, such as no power failures and no POST failures, without suffering the information loss that typically occurs in conventional recovery methods. One embodiment of an IHS disclosed herein includes a system real-time clock (RTC) configured to maintain current date and time values, a host processor configured to execute boot firmware and perform a Power-On Self-Test (POST) during a boot process for the IHS, and an embedded controller (EC) configured to execute embedded controller firmware during the boot process to detect a no power failure or a no POST failure, and reset or remove power from the system RTC if a no power failure or a no POST failure is detected.
1. An information handling system (IHS), comprising:
a system real-time clock (RTC) configured to maintain current date and time values;
a computer readable non-volatile (NV) memory configured to store a plurality of firmware regions including boot firmware, management engine (ME) firmware, and embedded controller (EC) firmware;
a host processor configured to execute the boot firmware when the IHS is powered on or rebooted to implement a boot process for the IHS, wherein the boot firmware is executable to perform a Power-On Self-Test (POST) during the boot process; and
an embedded controller (EC) configured to execute the embedded controller firmware, wherein during the boot process, the EC executes program instructions contained within the EC firmware to:
automatically detect a no power failure or a no POST failure;
automatically reset or remove power from the system RTC, if a no power failure or a no POST failure is detected, to recover from the detected no power failure or no POST failure; and
restart the boot process;
wherein the boot firmware is further executable by the host processor to prevent information loss when the boot process is restarted.
2. The information handling system as recited in claim 1 , wherein the EC is configured to detect the no power failure if one or more sleep state exit signals supplied from a platform controller hub (PCH) of the IHS fails to toggle within a predetermined timeout.
3. The information handling system as recited in claim 1 , wherein the EC is configured to detect the no POST failure if the boot firmware performs the POST a predetermined number of times.
4. The information handling system as recited in claim 1 , wherein the EC executes the program instructions contained within the EC firmware to:
set a no power boot flag within the EC upon detecting the no power failure;
set a no POST boot flag within the EC upon detecting the no POST failure; and
power cycle the IHS, after resetting or removing power from the RTC, to restart the boot process in response to detecting the no power failure or the no POST failure.
5. The information handling system as recited in claim 4 , wherein when the boot process is restarted, the boot firmware is further executable by the host processor to read and clear boot flags set within the EC.
6. The information handling system as recited in claim 5 , wherein upon reading a no power boot flag, the boot firmware is executable to prevent information loss by clearing a RTC power loss status flag stored in a register of the system RTC to prevent the boot firmware from loading default settings within the boot firmware and the ME firmware regions of the computer readable NV memory.
7. The information handling system as recited in claim 5 , wherein upon reading a no POST boot flag, the boot firmware is executable to prevent information loss by loading default settings within the boot firmware and the ME firmware regions of the computer readable NV memory.
8. The information handling system as recited in claim 5 , wherein upon reading a no power boot flag or a no POST boot flag, the boot firmware is executable to prevent information loss by:
restoring system date and time values maintained by the boot firmware using date and time values obtained from a clock included within the EC; and
sending a message to the EC indicating that the boot process is successful.
9. The information handling system as recited in claim 8 , wherein if the EC does not receive the message indicating that the boot process is successful within a predetermined timeout, the EC executes the program instructions contained within the EC firmware to:
increment a POST attempt count;
power cycle the IHS to restart the boot process if the POST attempt count does not exceed a maximum count; and
detect the no POST failure if the POST attempt count exceeds the maximum count.
10. A method performed during a boot process for an information handling system (IHS) comprising a system real-time clock (RTC), the method comprising:
power sequencing components of the IHS when the IHS is powered on;
monitoring sleep state exit signals coming from a platform controller hub (PCH) of the IHS to detect toggling of the sleep state exit signals;
automatically detecting a no power failure if one or more of the sleep state exit signals fails to toggle within a predetermined timeout;
wherein upon automatically detecting the no power failure, the method further comprises:
automatically recovering from the no power failure; and
preventing information loss when the boot process is subsequently restarted.
11. The method as recited in claim 10 , wherein automatically recovering from the no power failure comprises:
setting a no power boot flag within an embedded controller (EC) of the IHS;
resetting or removing power from the system RTC; and
power sequencing the IHS again to restart the boot process.
12. The method as recited in claim 11 , wherein the steps of power sequencing components of the IHS, monitoring sleep state exit signals, automatically detecting a no power failure, automatically recovering from the no power failure, setting a no power boot flag, resetting or removing power from the system RTC and power sequencing the IHS again to restart the boot process are performed by the EC executing EC firmware.
13. The method as recited in claim 11 , wherein after said power sequencing the IHS again to restart the boot process, the method further comprises:
reading and clearing the no power boot flag set within the EC;
clearing a RTC power loss status flag stored within a register of the system RTC;
restoring system date and time values using date and time values obtained from a clock included within the EC; and
sending a message to the EC indicating that the boot process is successful.
14. The method as recited in claim 13 , wherein the steps of reading and clearing the no power boot flag, clearing a RTC power loss status flag, restoring system date and time values and sending a message to the EC are performed by a host processor of the IHS executing boot firmware.
15. A method performed during a boot process for an information handling system (IHS) comprising a system real-time clock (RTC), the method comprising:
power sequencing components of the IHS when the IHS is powered on;
waiting to receive a message indicating that the boot process is successful; and
automatically detecting a no POST failure if the message is repeatedly not received within a predetermined timeout;
wherein upon automatically detecting the no power failure, the method further comprises:
automatically recovering from the no power failure; and
preventing information loss when the boot process is subsequently restarted.
16. The method as recited in claim 15 , wherein prior to said automatically detecting a no POST failure, the method comprises:
incrementing a POST attempt count if the message is not received within the predetermined timeout;
power sequencing the IHS to restart the boot process if the POST attempt count does not exceed a maximum count; and
automatically detecting the no POST failure if the POST attempt count exceeds the maximum count.
17. The method as recited in claim 15 , wherein automatically recovering from the no POST failure comprises:
setting a no POST boot flag within an embedded controller (EC) of the IHS;
resetting or removing power from the system RTC; and
power sequencing the IHS again to restart the boot process.
18. The method as recited in claim 17 , wherein the steps of power sequencing components of the IHS, waiting to receive a message, automatically detecting a no POST failure, automatically recovering from the no POST failure, setting a no POST boot flag, resetting or removing power from the system RTC, and power sequencing the IHS again to restart the boot process are performed by the EC executing EC firmware.
19. The method as recited in claim 17 , wherein after said power sequencing the IHS again to restart the boot process, the method further comprises:
reading and clearing the no POST boot flag set within the EC;
loading default settings within boot firmware and management firmware regions of a computer readable non-volatile memory included within the IHS;
restoring system date and time values using date and time values obtained from a clock included within the EC; and
sending a message to the EC indicating that the boot process is successful.
20. The method as recited in claim 19 , wherein the steps of reading and clearing the no POST boot flag, loading default settings, restoring system date and time values and sending a message to the EC are performed by a host processor of the IHS executing boot firmware.
21. An information handling system (IHS), comprising:
a system real-time clock (RTC) configured to maintain current date and time values;
a computer readable non-volatile (NV) memory configured to store a plurality of firmware regions including boot firmware, management engine (ME) firmware, and embedded controller (EC) firmware;
a host processor configured to execute the boot firmware when the IHS is powered on or rebooted to implement a boot process for the IHS, wherein the boot firmware is executable to perform a Power-On Self-Test (POST) during the boot process; and
an embedded controller (EC) configured to execute the embedded controller firmware, wherein during the boot process, the EC executes program instructions contained within the EC firmware to:
detect a no power failure or a no POST failure; and
reset or remove power from the system RTC if a no power failure or a no POST failure is detected;
wherein the EC executes the program instructions contained within the EC firmware to:
set a no power boot flag within the EC upon detecting the no power failure;
set a no POST boot flag within the EC upon detecting the no POST failure; and
power cycle the IHS, after resetting or removing power from the RTC, to restart the boot process in response to detecting the no power failure or the no POST failure;
wherein during the boot process, the boot firmware is further executable by the host processor to read and clear boot flags set within the EC; and
wherein upon reading a no power boot flag or a no POST boot flag, the boot firmware is further executable to:
restore system date and time values maintained by the boot firmware using date and time values obtained from a clock included within the EC; and
send a message to the EC indicating that the boot process is successful.
22. The information handling system as recited in claim 21 , wherein if the EC does not receive the message indicating that the boot process is successful within a predetermined timeout, the EC executes the program instructions contained within the EC firmware to:
increment a POST attempt count;
power cycle the IHS to restart the boot process if the POST attempt count does not exceed a maximum count; and
detect the no POST failure if the POST attempt count exceeds the maximum count.