IP Library Granted Patent US 10,937,835
Granted Patent B2
US 10,937,835 · App. 16/198,247 · Granted Mar 2, 2021

Low-noise integrated post-processed photodiode

Inventor: Robert Daniel McGrath (Lexington, MA)
Assignee: BAE Systems Imaging Solutions Inc.
H01L27/307H01L27/14612H01L27/14636H01L27/14643H01L27/1463H01L27/14689H01L51/442
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Quick Facts
Patent No.
US 10,937,835
App. No.
16/198,247
Granted
Mar 2, 2021
Kind
B2
Abstract

A pixel, is provided the pixel comprising: a photodiode structure built on top of an integrated circuit generating a charge; the integrated circuit comprising at least one semiconductor material and at least one interconnect layer; the at least one interconnect layer comprises an interconnect to facilitate charge flowing into a collection node disposed in the semiconductor material; the interconnect being in contact with a doped contact diffusion disposed proximate to the collection node; a transfer transistor disposed between the collection node and a conversion node, the conversion node coupled to an active transistor; the pixel having a reset configured to reset the conversion node.

Claims (17)

1. A pixel, the pixel comprising:

a photodiode structure built on an integrated circuit and generating a charge;

said integrated circuit comprising at least one semiconductor material and at least one interconnect layer;

said at least one interconnect layer comprises an interconnect to facilitate said charge flowing into a collection node disposed in said at least one semiconductor material;

a doped contact diffusion region disposed between said interconnect layer and said collection node, said doped contact diffusion region being in contact with said interconnect, wherein the doped contact diffusion region is an opposite doping type than the collection node;

a transfer transistor disposed between said collection node and a conversion node, said conversion node coupled to an active transistor;

said pixel having a reset configured to reset said conversion node.

2. The pixel of claim 1 where said integrated circuit is built in a metal oxide semiconductor (MOS) process.

3. The pixel of claim 1 wherein said integrated circuit is built in a complementary metal oxide semiconductor (CMOS) process.

4. The pixel of claim 1 , wherein said doped contact diffusion region is doped to a degree that it forms a layer that is conductive under operation.

5. The pixel of claim 1 wherein said doped contact diffusion region isolates said collection node from defects in an interface between said at least one interconnect layer and said at least one semiconductor material.

6. The pixel of claim 1 , wherein said at least one interconnect layer comprises a plurality of interconnect layers selected from the group of layers consisting of a dielectric layer and a conductive layer.

7. The pixel of claim 1 wherein said reset enables use of correlated double sampling.

8. The pixel of claim 1 wherein said photodiode structure further comprises at least one organic material.

9. The pixel of claim 8 wherein said at least one organic material contains a suspension of photoactive material.

10. The pixel of claim 1 wherein the interconnect comprises a metal.

11. The pixel of claim 1 wherein the semiconductor material has a same doping type as the collection node.

Assignments (2)
CHANGE OF NAME Recorded Dec 6, 2024
From: BAE SYSTEMS IMAGING SOLUTIONS INC.
To: FAIRCHILD IMAGING, INC.
Reel/Frame 069531/0646 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 12, 2018
From: MCGRATH, ROBERT DANIEL
To: BAE SYSTEMS IMAGING SOLUTIONS INC.
Reel/Frame 047751/0485 →
Continuity (1)
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