IP Library Granted Patent US 10,516,387
Granted Patent B2
US 10,516,387 · App. 16/203,153 · Granted Dec 24, 2019

Signal level converter and display driving device

Inventor: Akira Masaoka (Sakai, JP)
Assignee: SHARP KABUSHIKI KAISHA
H03K3/356113G09G3/20H03K19/018507G09G2310/0289G09G2310/0291
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Quick Facts
Patent No.
US 10,516,387
App. No.
16/203,153
Granted
Dec 24, 2019
Kind
B2
Abstract

A signal level converter includes a bias generating circuit that generates a bias voltage, and a level shifter circuit that converts a lower voltage signal into a higher voltage signal in response to the bias voltage. The bias generating circuit includes a replica circuit that controls an on-current of the level shifter circuit in response to the bias voltage output from an operational amplifier.

Claims (36)

1. A signal level converter comprising:

a bias generating circuit that generates a bias voltage; and

a level shifter circuit that converts a lower voltage signal into a higher voltage signal in response to the bias voltage,

wherein the level shifter includes a first higher withstand voltage transistor that applies the bias voltage to a gate, and

the bias generating circuit includes an operational amplifier that outputs the bias voltage,

a replica circuit that controls an on-current of the level shifter circuit in response to the bias voltage output from the operational amplifier,

wherein the replica circuit includes a replica transistor having a same characteristic as the first higher withstand voltage transistor that applies the bias voltage to the gate,

wherein the level shifter circuit comprises a first higher withstand voltage P-type transistor, a first higher withstand voltage N-type transistor, and a first lower to medium withstand voltage N-type transistor, connected in series in sequential order, and a second higher withstand voltage P-type transistor, a second higher withstand voltage N-type transistor, and a second lower to medium withstand voltage N-type transistor, and a second lower to medium withstand voltage N-type transistor connected in series in sequential order,

wherein the bias voltage is supplied to a node of a gate of the first higher withstand voltage N-type transistor and a gate of the second higher withstand voltage N-type transistor, and

wherein the replica circuit comprises a replica P-type transistor corresponding to the first higher withstand voltage P-type transistor and a replica N-type transistor corresponding to the first higher withstand voltage N-type transistor.

2. The signal level converter according to claim 1 ,

wherein the replica circuit comprises an on-current control variable resistor that is connected to a side of the replica N-type transistor opposite from the replica P-type transistor to control an on-current of the level shifter circuit; and

a register that modifies a value of the on-current control variable resistor.

3. The signal level converter according to claim 1 , further comprising:

a voltage to current converting circuit that converts the bias voltage generated by the bias generating circuit into a bias current signal and outputs the bias current signal; and

a current to voltage converting circuit that converts the bias current signal output from the voltage to current converting circuit into the bias voltage and supplies the bias voltage to the level shifter circuit.

4. The signal level converter according to claim 3 ,

further comprising a repeater circuit that distributes one output from the voltage to current converting circuit to a plurality of output branches.

5. The signal level converter according to claim 4 ,

wherein the repeater circuit is connected to the current to voltage converting circuit and another current to voltage converting circuit.

6. A display driving device comprising:

at least one first block including a bias generating circuit that generates a bias voltage, a voltage to current converting circuit that converts the bias voltage generated by the bias generating circuit into a bias current signal and outputs the bias current signal, and a control signal generating circuit that generates a control signal; and

at least one second block including a display driving signal generating block that generates a display driving signal, a current to voltage converting circuit that converts the bias current signal output from the voltage to current converting circuit into the bias voltage, and a level shifter circuit that converts a lower voltage signal into a higher voltage signal in response to the bias voltage,

wherein a number of the second blocks is higher than a number of the first blocks.

7. The display driving device according to claim 6 ,

wherein the first block further comprises a repeater circuit that distributes one output from the voltage to current converting circuit to a plurality of output branches.

8. A display driving device comprising:

at least one first block including a bias generating circuit that generates a bias voltage, a voltage to current converting circuit that converts the bias voltage generated by the bias generating circuit into a bias current signal and outputs the bias current signal, a repeater circuit that distributes one output from the voltage to current converting circuit to a plurality of output branches, and a control signal generating circuit that generates a control signal;

at least one second block including a display driving signal generating block that generates a display driving signal, a current to voltage converting circuit that converts the bias current signal output from the voltage to current converting circuit into the bias voltage, and a level shifter circuit that converts a lower voltage signal into a higher voltage signal in response to the bias voltage;

at least one third block including the current to voltage converting circuit, the level shifter circuit, and a current mirror circuit; and

at least one fourth block including the display driving signal generating block, the current to voltage converting circuit, the level shifter circuit, and the repeater circuit,

wherein the current mirror circuit in the third block is connected to the repeater circuit in the fourth block,

wherein each of a number of the third blocks and a number of the fourth blocks is higher than a number of the first blocks, and

wherein a number of the second blocks is higher than each of the number of the third blocks and the number of the fourth blocks.

9. The display driving device according to claim 6 ,

wherein the level shifter circuit in the second block converts a level of the control signal generated by the control signal generating circuit in the first block.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2020
From: SHARP KABUSHIKI KAISHA
To: SHENZHEN TOREY MICROELECTRONIC TECHNOLOGY CO. LTD.
Reel/Frame 053754/0905 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 28, 2018
From: MASAOKA, AKIRA
To: SHARP KABUSHIKI KAISHA
Reel/Frame 047613/0119 →
Priority Claims (1)
JP 2017-229462 · Nov 29, 2017 · national
Continuity (1)
Related Publication 20190165771A1 · May 30, 2019