IP Library Granted Patent US 10,566,273
Granted Patent B2
US 10,566,273 · App. 16/203,219 · Granted Feb 18, 2020

Chip-on-film semiconductor device

Inventor: Nobuaki Asayama (Sakai, JP)
Assignee: SHARP KABUSHIKI KAISHA
H01L23/49811H01L23/49838H01L2224/16225H01L2224/32225H01L2224/73204
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,566,273
App. No.
16/203,219
Granted
Feb 18, 2020
Kind
B2
Abstract

A chip-on-film semiconductor device includes a translucent insulator film, a first wire group including a plurality of wires on a first surface of the insulator film, a second wire group including a plurality of opaque wires on a second surface of the insulator film opposite to the first surface, and a semiconductor chip mounted on the first surface. The wires of the first wire group and semiconductor connection terminals of the semiconductor chip are joined together at junction portions. The second surface includes an unwired region, in which none of the wires of the second wire group are disposed, at a portion corresponding to any of the junction portions.

Claims (19)

1. A chip-on-film semiconductor device, comprising:

a translucent insulator film;

a first wire group including a plurality of wires on a first surface of the insulator film;

a second wire group including a plurality of opaque wires on a second surface of the insulator film opposite to the first surface; and

a semiconductor chip mounted on the first surface,

wherein the wires of the first wire group and semiconductor connection terminals of the semiconductor chip are joined together at junction portions, and

wherein the second surface includes at least one unwired region, in which none of the wires of the second wire group are disposed, at at least one portion corresponding to at least one of the junction portions.

2. The chip-on-film semiconductor device according to claim 1 ,

wherein the unwired region allows at least one of the junction portions to be visually recognized from the second surface through the insulator film.

3. The chip-on-film semiconductor device according to claim 1 , further comprising:

a protective layer disposed to cover the second wire group,

wherein the protective layer is open at the unwired region.

4. The chip-on-film semiconductor device according to claim 1 ,

wherein the semiconductor chip is rectangular, and

wherein the unwired region is arranged at at least one portico corresponding to at least one of the junction portions in a predetermined area at at least one end of the semiconductor chip in a longitudinal direction of the semiconductor chip.

5. The chip-on-film semiconductor device according to claim 1 ,

wherein the unwired region is formed by bending a subset of the wires of the second wire group.

6. The chip-on-film semiconductor device according to claim 1 ,

wherein a subset of the wires of the second wire group that defines the unwired region is arranged at a pitch wider than a pitch at which the other wires of the second wire group that do not define the unwired region are arranged.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2020
From: SHARP KABUSHIKI KAISHA
To: SHENZHEN TOREY MICROELECTRONIC TECHNOLOGY CO. LTD.
Reel/Frame 053754/0905 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 28, 2018
From: ASAYAMA, NOBUAKI
To: SHARP KABUSHIKI KAISHA
Reel/Frame 047613/0001 →