IP Library Granted Patent US 10,832,755
Granted Patent B2
US 10,832,755 · App. 16/218,225 · Granted Nov 10, 2020

Memory devices and methods of controlling an auto-refresh operation of the memory devices

Inventors: Youngjae Jin (Seoul, KR); Jin Wook Kim (Yongin-si, KR)
Assignee: SK hynix Inc.
G11C11/40611G11C11/40626G11C2211/4061G11C2211/4068
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Quick Facts
Patent No.
US 10,832,755
App. No.
16/218,225
Granted
Nov 10, 2020
Kind
B2
Abstract

A memory device includes a memory medium and a memory controller. The memory medium has a memory cell array and may be configured to generate a self-refresh signal, which varies based on an internal temperature of the memory medium, to control a self-refresh operation performed on the memory cell array. The memory controller may be configured to calculate an auto refresh cycle of an auto refresh control signal for controlling an auto-refresh operation of the memory medium based on the self-refresh signal.

Claims (50)

1. A memory device comprising:

a memory medium including a self-refresh controller, the self-refresh controller configured to control the performance of a self-refresh operation based on a self-refresh cycle varying according to an internal temperature of the memory medium; and

a memory controller configured to generate an auto refresh control signal for an auto-refresh operation performed by the memory medium based on an auto-refresh cycle, the auto-refresh cycle determined by a self-refresh signal received from the memory medium, the self-refresh signal varied based on the internal temperature of the memory medium,

wherein the self-refresh cycle is determined by comparing the self-refresh signal with a clock signal.

2. The memory device of claim 1 ,

wherein the memory medium includes a plurality of output pins, and

wherein the self-refresh signal is transmitted to the memory controller through and unused pin among the plurality of output pins of the memory medium.

3. The memory device of claim 1 , wherein the self-refresh controller includes:

a temperature sensor configured to output a voltage signal having a voltage level corresponding to the internal temperature of the memory medium;

a voltage adjustment oscillator configured to generate a base clock signal, a frequency of the base clock signal varying according to the voltage level of the voltage signal;

a self-refresh cycle adjuster configured to apply a predetermined division factor to the base clock signal to generate the self-refresh signal; and

an address counter configured to receive the self-refresh signal to generate a self-refresh address.

4. The memory device of claim 1 , wherein the memory controller includes:

a self-refresh cycle counter configured to receive the self-refresh signal to generate a counted value by comparing the self-refresh signal with the clock signal;

a temperature information converter configured to receive the counted value to generate a temperature code corresponding to the counted value; and

an auto-refresh controller configured to generate the auto refresh control signal for the auto-refresh operation performed by the memory medium based on the auto-refresh cycle varying according to the temperature code.

5. The memory device of claim 4 , wherein the self-refresh signal is a one-bit pulse signal.

6. The memory device of claim 4 , wherein the temperature information converter includes a storage table that stores the temperature code having a binary number form which is set to correspond to the counted value.

7. The memory device of claim 4 , wherein the auto-refresh controller reduces the auto-refresh cycle if the temperature code increases and increases the auto-refresh cycle if the temperature code is reduced.

8. A method of controlling an auto-refresh operation of a memory device, the method comprising:

performing a self-refresh operation based on a self-refresh cycle varying according to an internal temperature of a memory medium;

generating a self-refresh signal in the memory medium;

generating an auto-refresh signal having an auto-refresh cycle determined from the self-refresh signal varied by the internal temperature; and

transmitting an auto-refresh control signal to the memory medium such that the memory medium performs the auto-refresh operation based on the auto-refresh cycle,

wherein the auto-refresh control signal includes the auto-refresh signal, and

wherein the self-refresh cycle is determined by comparing the self-refresh signal with a clock signal.

9. The method of claim 8 , wherein generating the auto-refresh signal includes:

generating a counted value corresponding to a cycle of the self-refresh signal; and

generating the auto-refresh signal having the auto-refresh cycle varying according to a temperature code corresponding to the counted value.

10. A memory device comprising:

a memory medium including a memory cell array and configured to generate a self-refresh signal, which varies based on an internal temperature of the memory medium, to control a self-refresh operation performed on the memory cell array; and

a memory controller configured to calculate an auto refresh cycle of an auto refresh control signal for controlling an auto-refresh operation of the memory medium based on the self-refresh signal,

wherein the self-refresh cycle is determined by comparing the self-refresh signal with a clock signal.

11. The memory device of claim 10 ,

wherein the memory medium includes a plurality of output pins, and

wherein the self-refresh signal is transmitted to the memory controller through an unused pin among the plurality of output pins of the memory medium.

12. The memory device of claim 10 ,

wherein the memory medium includes a self-refresh controller,

wherein the self-refresh controller includes:

a temperature sensor configured to output a voltage signal having a voltage level corresponding to the internal temperature of the memory medium;

a voltage adjustment oscillator configured to generate a base clock signal, a frequency of the base clock signal varying according to the voltage level of the voltage signal;

a self-refresh cycle adjuster configured to apply a predetermined division factor to the base clock signal to generate the self-refresh signal; and

an address counter configured to receive the self-refresh signal to generate a self-refresh address.

13. The memory device of claim 10 , wherein the memory controller includes:

a self-refresh cycle counter configured to receive the self-refresh signal to generate a counted value by comparing the self-refresh signal with the clock signal;

a temperature information converter configured to receive the counted value to generate a temperature code corresponding to the counted value; and

an auto-refresh controller configured to generate the auto refresh control signal for the auto-refresh operation performed by the memory medium based on the auto-refresh cycle varying according to the temperature code.

14. The memory device of claim 13 , wherein the self-refresh signal is a one-bit pulse signal.

15. The memory device of claim 13 , wherein the temperature information converter includes a storage table that stores the temperature code having a binary number form which is set to correspond to the counted value.

16. The memory device of claim 13 , wherein the auto-refresh controller reduces the auto-refresh cycle if the temperature code increases and increases the auto-refresh cycle if the temperature code is reduced.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2024
From: SK HYNIX INC.
To: MIMIRIP LLC
Reel/Frame 067335/0246 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 12, 2018
From: JIN, YOUNGJAE; KIM, JIN WOOK
To: SK HYNIX INC.
Reel/Frame 047759/0430 →