IP Library Granted Patent US 10,923,024
Granted Patent B2
US 10,923,024 · App. 16/219,390 · Granted Feb 16, 2021

LED display module and method of making thereof

Inventors: Shihfeng Shao (Milpitas, CA); Chang Hung Pan (Milpitas, CA); Heng Liu (Milpitas, CA); Eric Li (Milpitas, CA)
Assignee: SCT LTD.
G09G3/32H01L25/0753H01L33/26H01L33/505H01L33/62H01L33/647H05K1/0274H01L2933/0066
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Quick Facts
Patent No.
US 10,923,024
App. No.
16/219,390
Granted
Feb 16, 2021
Kind
B2
Abstract

An LED display module contains a PCB, one or more layers of molding compound disposed on the surface of the PCB, a network of conductive tracks disposed on a surface of the one or more layer of molding compound away from the PCB, a plurality of through-holes extending through the one or more layers of molding compound, and an array of LED chips disposed in the one or more layers of molding compound. Each of electrodes on the LED chip is connected to one of the conductive pads via a conductive path. The conductive path comprises a conductive material inside one of the plurality of the through-holes and a portion of the network of conductive tracks.

Claims (50)

1. A light emitting diode (LED) display module, comprising:

a printed circuit board (PCB) having a plurality of conductive pads disposed on a surface of the PCB;

one or more layers of molding compound disposed on the surface of the PCB;

a network of conductive tracks residing in or on the one or more layer of molding compound away from the PCB;

a plurality of through-holes extending through the one or more layers of molding compound, each leading to one of the plurality of conductive pads; and

an array of LED chips disposed in the one or more layers of molding compound,

wherein each of the array of LED chips has a p-electrode and an n-electrode, wherein each of the p-electrode and the n-electrode is connected to one of the plurality of the conductive pads via a conductive path, wherein the conductive path comprises a conductive material inside one of the plurality of through-holes and a portion of the network of conductive tracks.

2. The LED display module of claim 1 , comprising a first layer of molding compound disposed on the PCB and a second layer of molding compound disposed on the first layer of molding compound, wherein the network of conductive tracks resides in or on the second layer of molding compound.

3. The LED display module of claim 2 , wherein the second layer of molding compound is formed by spin coating and curing of a photoresist, which is engraved by UV or laser etching.

4. The LED display module of claim 1 , wherein the network of conductive tracks is applied by inkjet printing or deposited by electron beam evaporation.

5. The LED display module of claim 1 , wherein each of the array of LED chips is constructed without a base substrate made of sapphire or silicon carbide (SiC).

6. The LED display module of claim 2 , further comprising a third layer of molding compound encapsulating the array of LED chips and the network of conductive tracks.

7. The LED display module of claim 2 , further comprising a black resin portion partially covering the second layer of molding compound.

8. The LED display module of claim 6 , wherein the third layer of molding compound is disposed over a set of R, G and B LED chips to form a color-mixing window, wherein the color-mixing window is made from a transparent epoxy or an epoxy optical diffuser disposed therein.

9. A method of fabricating a light emitting diode (LED) display module of claim 1 , the method comprising:

providing a panel and disposing an array of LED chips, each having a p-electrode and an n-electrode, on the panel;

providing a printed circuit board (PCB) having a plurality of conductive pads on a surface of the PCB;

flipping the panel having the array of LED chips thereon and aligning the panel with the PCB such that the LED chips face the PCB;

filling, with an opaque molding compound, in a space between the panel having the array of LED chips and the PCB to form an opaque layer;

removing the panel from the opaque layer, wherein the array of LED chips is detached from the panel and is partially buried in the opaque layer;

covering a transparent layer of a transparent molding compound over the opaque layer, wherein the transparent layer having a plurality of through-holes, and a plurality of trenches connecting two or more through-holes; and

disposing a conductive material on the transparent layer to fill in the plurality of through-holes and the plurality of trenches with the conductive material, whereby the plurality of LED chips is electrically connected to the PCB and two or more of the plurality of LED chips are interconnected.

10. The method of claim 9 , wherein the step of providing the panel and disposing the array of LED chips comprises:

preparing a glass substrate;

attaching a thermal release tape onto the glass substrate; and

disposing the array of LED chips, arranged in rows and columns, on the thermal release tape.

11. The method of claim 9 , wherein each of the array of LED chips is constructed without a base substrate made of sapphire or silicon carbide (SiC).

12. The method of claim 9 , wherein the step of providing the PCB comprises:

preparing a PCB substrate;

performing a surface mount technology (SMT) process on the PCB substrate to place one or more electronic components on a bottom surface of the PCB substrate; and

disposing a plurality of lead-free solder columns on the plurality of conductive pads on a top surface of the PCB substrate.

13. The method of claim 12 , wherein the step of flipping the panel and aligning the panel with the PCB comprises pressing the panel having the array of LED chips against the PCB after aligning the panel with the PCB so that an end of each of the plurality of solder columns is partially buried in the thermal release tape.

14. The method of claim 10 , wherein the step of removing the panel comprises:

removing the glass substrate and the thermal release tape; and

exposing contacts of each of the array of LED chips and the end of each of the plurality of solder columns.

15. The method of claim 9 , wherein covering the transparent layer over the opaque layer comprises:

molding a transparent layer on the opaque layer;

engraving the transparent layer to form a plurality of through-holes, wherein each of the plurality of through-holes leads to each of the plurality of solder columns or each of the p-electrode and the n-electrode of each of the array of the LED chips; and

etching the transparent layer to form a plurality of trenches, wherein each of the plurality of trenches connects two or more through-holes from each other.

16. The method of claim 15 , wherein the step of molding the transparent layer includes spin coating and curing of a photoresist, which is engraved by UV or laser etching.

17. The method of claim 15 , wherein the step of engraving the transparent layer comprises:

engraving the transparent layer by laser etching to form the plurality of through-holes; and

cleaning the surface of the transparent layer by a plasma descumming.

18. The method of claim 9 , wherein the step of disposing the conductive material on the transparent layer is conducted by inkjet printing or electron beam evaporation.

19. The method of claim 9 , further comprising disposing a black resin on the transparent layer to form a black resin portion partially covering the transparent layer.

20. The method of claim 19 , further comprising covering a second transparent layer over the transparent layer and the black resin portion to encapsulate the array of LED chips and the conductive material filled in the plurality of through-holes and the plurality of trenches.

21. The method of claim 9 , further comprising covering black resin layer over the transparent layer.

22. The method of claim 21 , further comprising:

etching the black resin layer and exposing a set of R, G and B LED chips to form a color-mixing cavity; and

filling the color-mixing cavity with a transparent epoxy or an epoxy optical diffuser disposed therein to form a color-mixing window.

Assignments (2)
LICENSE Recorded Sep 17, 2023
From: SILICONCORE TECHNOLOGY, INC.
To: SEOUL SEMICONDUCTOR CO., LTD.
Reel/Frame 064929/0302 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 13, 2018
From: SHAO, SHIHFENG; PAN, CHANG HUNG; LIU, HENG; LI, ERIC
To: SCT LTD.
Reel/Frame 047770/0791 →
Continuity (1)
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