IP Library Granted Patent US 10,503,197
Granted Patent B2
US 10,503,197 · App. 16/220,762 · Granted Dec 10, 2019

Current generation circuit

Inventors: Masakazu Sugiura (Chiba, JP); Atsushi Igarashi (Chiba, JP); Nao Otsuka (Chiba, JP)
Assignee: ABLIC INC.
G05F3/262G05F3/24G05F3/30
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Quick Facts
Patent No.
US 10,503,197
App. No.
16/220,762
Granted
Dec 10, 2019
Kind
B2
Abstract

A current generation circuit includes: a current source circuit including a first transistor and a first resistor, and configured to output a first current based on a source voltage or a drain voltage of the first transistor and a resistance of the first resistor; a current control circuit including a voltage input terminal, a second transistor and a third transistor, and configured to output a second current based on a source voltage of the second transistor and a resistance of the third transistor; and an impedance circuit including a second resistor formed of a same resistive body as the first resistor and a fourth transistor diode-connected to the second resistor, and configured to generate a control voltage at the voltage input terminal by the first current and the second current, wherein the current generation circuit is configured to output a current based on the second current.

Claims (12)

1. A current generation circuit comprising:

a current source circuit comprising a first transistor having a gate to which a first bias voltage is supplied, and a first resistor connected to a source or drain of the first transistor, and configured to output a first current based on a source voltage or a drain voltage of the first transistor and a resistance of the first resistor;

a current control circuit comprising a voltage input terminal, a second transistor having a gate to which a second bias voltage is supplied, and a third transistor connected to a source of the second transistor and having a gate to which a voltage of the voltage input terminal is supplied, the current control circuit being configured to output a second current based on a source voltage of the second transistor and a resistance of the third transistor; and

an impedance circuit comprising a second resistor formed of a same resistive body as the first resistor, and a fourth transistor connected in series with the second resistor and having a gate and a drain being short-circuited, the impedance circuit being configured to generate a control voltage at the voltage input terminal by the first current and the second current,

wherein the current generation circuit is configured to output a current based on the second current.

2. The current generation circuit according to claim 1 , wherein the first bias voltage is a voltage at which the first transistor operates in a weak inversion region.

3. The current generation circuit according to claim 1 , wherein the second bias voltage is a voltage at which the second transistor operates in a weak inversion region.

4. A current generation circuit comprising:

a current source circuit comprising a first transistor having a gate to which a first bias voltage is supplied, and a first resistor connected to a source or drain of the first transistor, and configured to output a first current based on a source voltage or a drain voltage of the first transistor and a resistance of the first resistor;

a current control circuit comprising a voltage input terminal, a second transistor having a gate to which a second bias voltage is supplied, and a third transistor connected to a source of the second transistor and having a gate to which a voltage of the voltage input terminal is supplied, the current control circuit being configured to output a second current based on a source voltage of the second transistor and a resistance of the third transistor; and

an impedance circuit comprising a second resistor formed of a same resistive body as the first resistor, and a PN junction element connected in series with the second resistor, the impedance circuit being configured to generate a control voltage at the voltage input terminal by the first current and the second current,

wherein the current generation circuit is configured to output a current based on the second current.

Assignments (2)
CHANGE OF ADDRESS Recorded Jun 8, 2023
From: ABLIC INC.
To: ABLIC INC.
Reel/Frame 064021/0575 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2018
From: SUGIURA, MASAKAZU; IGARASHI, ATSUSHI; OTSUKA, NAO
To: ABLIC INC.
Reel/Frame 047784/0323 →