IP Library Granted Patent US 10,902,787
Granted Patent B2
US 10,902,787 · App. 16/222,756 · Granted Jan 26, 2021

Asynchronous control of display update and light emission

Inventors: Yu-Hsun Peng (Shanghai, CN); Shih-Wei Tseng (Shanghai, CN); Jing Gu (Shanghai, CN)
Assignee: SHANGHAI YUNYINGGU TECHNOLOGY CO., LTD.
G09G3/3266G09G3/32G09G3/3233G09G3/342G09G3/36G09G2310/024G09G2310/0237G09G2310/08G09G2320/0257G09G2320/064
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Quick Facts
Patent No.
US 10,902,787
App. No.
16/222,756
Granted
Jan 26, 2021
Kind
B2
Abstract

An apparatus for display includes an active region, a gate scanning driver, and light emitting driver. The active region includes a plurality of subpixels. The gate scanning driver is operatively coupled to the active region and configured to scan the plurality of subpixels in a first period of each frame at a first rate. The light emitting driver is operatively coupled to the active region and configured to cause the plurality of subpixels to start emitting light in a second period of each frame at a second rate. The second rate is higher than the first rate. The second period overlaps the first period.

Claims (59)

1. An apparatus for display, comprising:

an active region comprising a plurality of subpixels arranged in an array having a plurality of rows of subpixels;

a gate scanning driver operatively coupled to the active region and configured to scan the plurality of subpixels in a first period of each frame at a first rate, the gate scanning driver sequentially scanning the plurality of rows of subpixels in accordance with a first clock frequency; and

light emitting driver operatively coupled to the active region and configured to cause the plurality of subpixels to start emitting light in a second period of each frame at a second rate, the light emitting driver sequentially causing the plurality of rows of subpixels to start emitting light in accordance with a second clock frequency,

wherein the second rate is higher than the first rate,

the second period overlaps the first period,

the second clock frequency is higher than the first clock frequency, and

a first number of rows of subpixels scanned by the gate scanning driver in each first clock period is the same as a second number of rows of subpixels that start to emitting light in each second clock period caused by the light emitting driver.

2. The apparatus of claim 1 , wherein N/Ve≥(N−S)/Vg,

where N is the number of the plurality of subpixels,

S is the number of subpixels that have been scanned by the gate scanning driver in each frame when the light emitting driver causes the first subpixel of the plurality of subpixels to start emitting light,

Vg is the first rate, and

Ve is the second rate.

3. The apparatus of claim 1 , wherein S/Vg≥E/Ve,

where E is the number of subpixels that simultaneously emit light caused by the light emitting driver in each frame,

S is the number of subpixels that have been scanned by the gate scanning driver in each frame when the light emitting driver causes the first subpixel of the plurality of subpixels to start emitting light,

Vg is the first rate, and

Ve is the second rate.

4. The apparatus of claim 1 , wherein the second period overlaps the first period at least 10% of a period of the frame.

5. The apparatus of claim 1 , wherein during a period when the second period overlaps the first period, the gate scanning driver scans a first set of the plurality of subpixels while the light emitting driver causes a second set of the plurality of subpixels to start emitting light.

6. The apparatus of claim 5 , wherein a number of the first or second set of the plurality of subpixels is at least 10% of a number of the plurality of subpixels.

7. The apparatus of claim 1 , wherein the second rate is at least 10% higher than the first rate.

8. The apparatus of claim 7 , wherein the second rate is about 100% higher than the first rate.

9. The apparatus of claim 1 , wherein the active region is one of a plurality of zones divided from a display panel.

10. The apparatus of claim 1 , further comprising:

control logic operatively coupled to the gate scanning driver and the light emitting driver and configured to provide a plurality of control signals to the gate scanning driver and the light emitting driver to control operations of the gate scanning driver and the light emitting driver,

wherein the control signals comprises:

a first set of enable signals and a first set of clock signals provided to the gate scanning driver, and

a second set of enable signals and a second set of clock signals provided to the light emitting driver.

11. The apparatus of claim 10 , wherein

the gate scanning driver scans the plurality of subpixels in accordance with a first clock frequency associated with the first set of clock signals;

the light emitting driver causes the plurality of subpixels to start emitting light in accordance with a second clock frequency associated with the second set of clock signals; and

the second frequency is higher than a first frequency.

12. The apparatus of claim 1 , wherein each of the plurality of subpixels comprises light emitting element.

13. A system for display, comprising:

an active region comprising a plurality of subpixels arranged in an array having a plurality of rows of subpixels;

control logic configured to provide a plurality of control signals comprising a first set of enable signals, a first set of clock signals, a second set of enable signals, and a second set of clock signals;

a gate scanning driver operatively coupled to the active region and the control logic and configured to scan the plurality of subpixels in a first period of each frame at a first rate based at least in part on the first set of enable signals and the first set of clock signals, the gate scanning driver sequentially scanning the plurality of rows of subpixels in accordance with a first clock frequency associated with the first set of clock signals; and

light emitting driver operatively coupled to the active region and the control logic and configured to cause the plurality of subpixels to start emitting light in a second period of each frame at a second rate based at least in part on the second set of enable signals and the second set of clock signals, the light emitting driver sequentially causing the plurality of rows of subpixels to start emitting light in accordance with a second clock frequency associated with the second set of clock signals,

wherein the second rate is higher than the first rate,

the second period overlaps the first period,

the second clock frequency is the same as the first clock frequency, and

a first number of rows of subpixels scanned by the gate scanning driver in each first clock period is less than a second number of rows of subpixels that start to emitting light in each second clock period caused by the light emitting driver.

14. An apparatus, comprising:

a timing controller configured to provide a first set of enable signals and a second set of enable signals; and

a clock generator configured to provide a first set of clock signals associated with a first clock frequency and a second set of clock signals associated with a second clock frequency that is higher than the first clock frequency,

wherein the first set of enable signals and the first set of clock signals control a gate scanning driver to sequentially scan a plurality of rows of subpixels on a display panel in accordance with the first clock frequency,

the second set of enable signals and the second set of clock signals control a light emitting driver to sequentially cause the plurality of rows of subpixels to start emitting light in accordance with the second clock frequency, and

a first number of rows of subpixels scanned by the gate scanning driver in each first clock period is the same as a second number of rows of subpixels that start to emitting light in each second clock period caused by the light emitting driver.

15. A method for driving a plurality of subpixels arranged in an array having a plurality of rows of subpixels on a display panel, comprising:

scanning, using a gate scanning driver, the plurality of subpixels in a first period of each frame at a first rate, the gate scanning driver sequentially scanning the plurality of rows of subpixels in accordance with a first clock frequency; and

causing, using a light emitting driver, the plurality of subpixels to start emitting light in a second period of each frame at a second rate, the light emitting driver sequentially causing the plurality of rows of subpixels to start emitting light in accordance with a second clock frequency,

wherein the second rate is higher than the first rate,

the second period overlaps the first period,

the second clock frequency is the same as the first clock frequency, and

a first number of rows of subpixels scanned by the gate scanning driver in each first clock period is less than a second number of rows of subpixels that start to emitting light in each second clock period caused by the light emitting driver.

16. The method of claim 15 , wherein the second period overlaps the first period at least 10% of a period of the frame.

17. The method of claim 15 , wherein during a period when the second period overlaps the first period, a first set of the plurality of subpixels are scanned while a second set of the plurality of subpixels are caused to start emitting light.

18. The method of claim 17 , wherein a number of the first or second set of the plurality of subpixels is at least 10% of a number of the plurality of subpixels.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 8, 2021
From: SHANGHAI YUNYINGGU TECHNOLOGY CO., LTD.
To: KUNSHAN YUNYINGGU ELECTRONIC TECHNOLOGY CO., LTD.
Reel/Frame 055262/0147 →
CHANGE OF NAME Recorded Feb 27, 2019
From: VIEWTRIX TECHNOLOGY CO., LTD.
To: SHANGHAI YUNYINGGU TECHNOLOGY CO., LTD.
Reel/Frame 048460/0873 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2018
From: PENG, YU-HSUN; TSENG, SHIH-WEI; GU, JING
To: VIEWTRIX TECHNOLOGY CO., LTD.
Reel/Frame 047811/0826 →
Continuity (2)
Continuation PCTCN2017070572 · Jan 8, 2017
Related Publication 20190139496A1 · May 9, 2019
Cited By (2)
US 12,518,688 US 12,725,571