Programmable gain amplifier systems and methods

1. A method comprising:

amplifying a difference between a positive voltage input signal (Vp) and a negative voltage input signal (Vn) to generate an amplified differential output voltage comprising a positive voltage output signal (Voutp) and a negative voltage output signal (Voutn);

generating an itail voltage corresponding to a greater of the positive voltage input signal (Vp) and the negative voltage input signal (Vn);

applying the itail voltage and a first voltage corresponding to the positive voltage input signal (Vp) to a first resistor (rgp) to generate the positive voltage output signal (Voutp); and

applying the itail voltage and a second voltage corresponding to the negative voltage input signal (Vn) to a second resistor (rgn) to generate the negative voltage output signal (Voutn);

outputting a positive output current (Ioutp) corresponding to the current flowing through the first resistor (rgp), wherein if the positive voltage input signal (Vp) is greater than the negative voltage input signal (Vn), the positive output current (Ioutp) is proportional to the positive voltage input signal (Vp) minus the negative voltage input signal (Vn); and

outputting a negative output current (Ioutn) corresponding to the current flowing through the second resistor (rgn), wherein if the negative voltage input signal (Vn) is greater than the positive voltage input signal (Vp), the negative output current (Ioutn) is proportional to the negative voltage input signal (Vn) minus the positive voltage input signal (Vp).

2. The method of claim 1 further comprising generating, by a sensor in response to sensed phenomena, the positive voltage input signal (Vp) and the negative voltage input signal (Vn).

3. The method of claim 1 , wherein amplifying the difference between the positive voltage input signal (Vp) and the negative voltage input signal (Vn) to generate the amplified differential output voltage further comprises:

generating a positive voltage difference signal corresponding to the difference between the positive voltage input signal (Vp) and the positive voltage output signal (Voutp); and

generating a negative voltage difference signal corresponding to the difference between the negative voltage input signal (Vn) and the negative voltage output signal (Voutn).

4. The method of claim 3 , wherein amplifying the difference between the positive voltage input signal (Vp) and the negative voltage input signal (Vn) to generate the amplified differential output voltage further comprises:

generating, by a first bias circuit, first gate control signals to drive a first transistor to correct for the positive voltage difference signal, and a third transistor to produce a positive current (Ip) and a common mode current (Icm); and

generating, by a second bias circuit, second gate control signals to drive a second transistor to correct for the negative voltage difference signal and a fourth transistor to produce a negative current (In) and the common mode current (Icm).

5. The method of claim 4 , wherein the positive output current (Ioutp) is generated from the positive current (Ip) and the common mode current (Icm); and wherein the negative output current (Ioutn) is generated from the negative current (In) and the common mode current (Icm).

6. The method of claim 5 , further comprising sensing current output voltages of positive output current (Ioutp) and negative output current (Ioutn) and creating common mode feedback to maintain a predetermined interface voltage.

7. The method of claim 6 , further comprising transmitting the positive output current (Ioutp) and the negative output current (Ioutn) to an analog to digital converter.

8. The method of claim 4 , wherein the positive current (Ip) is proportional to the difference between the positive voltage input signal (Vp) and the positive voltage output signal (voutp); and

wherein the negative current (In) is proportional to the difference between the negative voltage input signal (Vn) and the negative voltage output signal (voutn).

9. The method of claim 1 , wherein when the positive voltage input signal (Vp) is greater than the negative voltage input signal (Vn), the negative output current (Ioutn) is zero; and

wherein when the negative voltage input signal (Vn) is greater than the positive voltage input signal (Vp), the positive output current (Ioutp) is zero.

10. The method of claim 1 , wherein the first resistor and the second resistor are variable gain resistors; and wherein the method further comprises:

adjusting, using the variable gain resistors, a gain applied to the positive voltage output signal (Voutp) and the negative voltage output signal (Voutn).

11. A programmable gain amplifier comprising:

amplifier circuitry comprising positive voltage circuitry operable to receive and process a positive voltage input signal (Vp) and negative voltage circuitry operable to receive and process a negative voltage input signal (Vn), the amplifier circuitry operable to generate an amplified differential output voltage comprising a positive voltage output signal (Voutp) and a negative voltage output signal (Voutn);

an itail connection coupled between the positive voltage circuitry and the negative voltage circuitry, the itail connection operable to generate an itail voltage corresponding to a greater of the positive voltage input signal (Vp) and the negative voltage input signal (Vn);

a first resistor (rgp) disposed to receive the itail voltage and a first voltage corresponding to the positive voltage input signal (Vp) and operable to generate the positive voltage output signal (Voutp);

a second resistor (rgn) disposed to receive the itail voltage and a second voltage corresponding to the negative voltage input signal (Vn) and operable to generate the negative voltage output signal (Voutn);

a first current output node coupled to the output of the first resistor and operable to output a positive output current (Ioutp) corresponding to the current flowing through the first resistor (rgp), wherein if the positive voltage input signal (Vp) is greater than the negative voltage input signal (Vn), the positive output current (Ioutp) is proportional to the positive voltage input signal (Vp) minus the negative voltage input signal (Vn), otherwise the positive output current (Ioutp) is approximately zero; and

a second current output node coupled to the output of the second resistor and operable to output a negative output current (Ioutn) corresponding to the current flowing through the second resistor (rgn), wherein if the negative voltage input signal (Vn) is greater than the positive voltage input signal (Vp), the negative output current (Ioutn) is proportional to the negative voltage input signal (Vn) minus the positive voltage input signal (Vp), otherwise the negative output current (Ioutn) is approximately zero.

12. The programmable gain amplifier of claim 11 further comprising a sensor operable to sense phenomena and generate the positive voltage input signal (Vp) and the negative voltage input sign (Vn).

13. The programmable gain amplifier of claim 11 , wherein the amplifier circuitry further comprises:

a first operational amplifier operable to generate a positive voltage difference signal corresponding to the difference between the positive voltage input signal (Vp) and the positive voltage output signal (Voutp); and

a second operational amplified operable to generate a negative voltage difference signal corresponding to the difference between the negative voltage input signal (Vn) and the negative voltage output signal (Voutn).

14. The programmable gain amplifier of claim 13 , wherein the amplifier circuitry further comprises:

a first bias circuit operable to generate first gate control signals to drive a first transistor to correct for the positive voltage difference signal, and a third transistor to produce a positive current (Ip) and a common mode current (Icm); and

a second bias circuit operable to generate second gate control signals to drive a second transistor to correct for the negative voltage difference signal and a fourth transistor to produce a negative current (In) and the common mode current (Icm).

15. The programmable gain amplifier of claim 14 , wherein the positive output current (Ioutp) is generated from the positive current (Ip) and the common mode current (Icm); and wherein the negative output current (Ioutn) is generated from the negative current (In) and the common mode current (Icm).

16. The programmable gain amplifier of claim 15 , further comprising common mode virtual ground control circuitry operable to sense current output voltages of positive output current (Ioutp) and negative output current (Ioutn) and create common mode feedback to maintain a predetermined interface voltage.

17. The programmable gain amplifier of claim 16 , wherein the positive output current (Ioutp) and the negative output current (Ioutn) are coupled to an analog to digital converter.

18. The programmable gain amplifier of claim 14 , wherein the positive current (Ip) is proportional to the difference between the positive voltage input signal (Vp) and the positive voltage output signal (voutp); and

wherein the negative current (In) is proportional to the difference between the negative voltage input signal (Vn) and the negative voltage output signal (voutn).

19. The programmable gain amplifier of claim 11 , wherein when the positive voltage input signal (Vp) is greater than the negative voltage input signal (Vn), the negative output current (Ioutn) (Ioutp) is zero; and

wherein when the negative voltage input signal (Vn) is greater than the positive voltage input signal (Vp), the positive output current (Ioutp) is zero.

20. The programmable gain amplifier of claim 11 , wherein the first resistor and the second resistor are variable gain resistors operable to adjust a gain applied to the positive voltage output signal (Voutp) and the negative voltage output signal (Voutn).