Reference voltage generator

1. A reference voltage generator comprising:

an amplifier;

a first capacitor;

a second capacitor; and

a switch controller operable to control connectivity of the first capacitor in a feedback path of the amplifier to generate a reference voltage, the switch controller operable to switch between: i) a first mode in which the first capacitor is absent from the feedback path of the amplifier during charging of the first capacitor, and ii) a second mode of inserting the charged first capacitor into the feedback path of the amplifier; and

wherein the first capacitor and the second capacitor are connected in parallel during the first mode.

2. The reference voltage generator as in claim 1 , wherein the first mode includes operating the amplifier in a unity gain mode in which an output of the amplifier is coupled to an inverting input of the amplifier; and

wherein the second mode includes operating the amplifier in a gain mode in which the first capacitor is coupled between the inverting input of the amplifier and the output of the amplifier.

3. The reference voltage generator as in claim 2 , further comprising:

a first semiconductor device;

a first current driver; and

wherein, during the first mode, the switch controller is operable to couple the first current driver to the first semiconductor device, the first current driver supplying first current through the first semiconductor device during the first mode to generate a first voltage applied to the non-inverting input of the amplifier.

4. The reference voltage generator as in claim 3 , further comprising:

a third capacitor;

a second semiconductor device;

a second current driver; and

wherein, during the first mode: the switch controller is operable to couple the second current driver to the second semiconductor device, the second current driver supplying second current through the second semiconductor device during the first mode to generate a second voltage inputted to the third capacitor, the third capacitor disposed between the second semiconductor device and an inverting input of the amplifier.

5. The reference voltage generator as in claim 4 , wherein, during the second mode, the switch controller is operable to couple the second current driver to the first semiconductor device, the current driver supplying current through the first semiconductor device in the second mode to generate a third voltage applied to the non-inverting input of the amplifier.

6. The reference voltage generator as in claim 4 , wherein an area factor of the first semiconductor device is substantially equal to an area factor of the second semiconductor device.

7. The reference voltage generator as in claim 4 , further comprising:

a biasing circuit operable to switch between driving the first current driver and the second current driver based on a first bias signal and a second bias signal, the first bias signal initializing operation of the reference voltage generator to produce the reference voltage, the second bias signal generated via a voltage to current converter.

8. The reference voltage generator as in claim 1 , wherein a magnitude of the reference voltage is substantially constant over a range of temperatures; and

wherein a magnitude of the reference voltage is less than 1 VDC.

9. The reference voltage generator as in claim 1 , further comprising:

a third capacitor; and

wherein each of the first capacitor, the second capacitor, and the third capacitor is coupled to an inverting input of the amplifier; and

wherein the second capacitor and the third capacitor are connected in parallel during the second mode.

10. The reference voltage generator as in claim 1 , wherein the second capacitor is coupled to the amplifier, a setting of the second capacitor selected to provide first order temperature compensation of generating the reference voltage across a range of different temperatures.

11. The reference voltage generator as in claim 1 , further comprising:

a third capacitor, the first capacitor and the third capacitor being connected in parallel during the second mode.

12. The reference voltage generator as in claim 11 , wherein each of the first capacitor, the second capacitor, and the third capacitor is coupled to an inverting input of the amplifier; and

wherein the feedback path extends between an output of the amplifier and an inverting input node of the amplifier.

13. The reference voltage generator as in claim 1 , wherein each of the first capacitor, the second capacitor, and a third capacitor is coupled to an inverting input of the amplifier; and

wherein the first capacitor and the second capacitor are connected in parallel to a ground reference voltage during the first mode; and

wherein the second capacitor and the third capacitor are connected in parallel to the ground reference voltage during the second mode.

14. The reference voltage generator as in claim 5 , wherein each of the first capacitor, the second capacitor, and the third capacitor is coupled to an inverting input of the amplifier; and

wherein the first capacitor and the second capacitor are connected in parallel to a ground reference voltage during the first mode; and

wherein the second capacitor and the third capacitor are connected in parallel to the ground reference voltage during the second mode.

15. The reference voltage generator as in claim 1 , further comprising:

a third capacitor;

wherein a voltage of a non-inverting input node of the amplifier in the first mode is Veb(I)+Voffset, where Veb(I) is a voltage produced by supplying current I through a first circuit component, where Voffset is an input offset voltage of the amplifier;

wherein the voltage of the non-inverting input node of the amplifier in the second mode is Veb(nl)+Voffset, where Veb(nl) is a voltage produced by supplying current nl through the first circuit component;

where C 1 =a capacitance of the first capacitor;

where C 2 =a capacitance of the second capacitor;

where C 3 =a capacitance of the third capacitor;

wherein, for the first mode:

Qph 1=[{ Veb ( I )+ V offset}− Veb ( nl )] C 3+[ Veb ( I )+ V offset] C 2+[ Veb ( I )+ V offset] C 1, where Qph 1=total charge of the first capacitor, the second capacitor and the third capacitor;

wherein, for the second mode:

Qph 2=[ Veb ( nl )+ V off] C 3+[ Veb ( nl )+ V off] C 2+[{ Veb ( nl )+ V off}− Vo ] C 1, where Qph 2=the total charge of the first capacitor, the second capacitor and the third capacitor.

16. The reference voltage generator as in claim 15 , wherein the total charge is conserved between switching from the first mode to the second mode in which Qph 1 =Qph 2 , wherein:

[{ Veb ( I )+ V off}− Veb ( nl )] C 3+[ Veb ( I )+ V off] C 2+[ Veb ( I )+ V off] C 1==[ Veb ( nl )+ V off] C 3+[ Veb ( nl )+ V off] C 2+[{ Veb ( nl )+ V off}− V ref] C 1.

17. The reference voltage generator as in claim 16 , wherein:

V ref=[( C 3+ C 2+ C 1)/ C 1]Δ Vbe +( C 3/ C 1) Veb ( nl ),

where ΔVbe=Veb(nl)−Veb(I), and Vref=a magnitude of the reference voltage.

18. A reference voltage generator comprising:

an amplifier;

a first capacitor; and

a switch controller operable to control connectivity of the first capacitor in a feedback path of the amplifier to generate a reference voltage, the switch controller operable to switch between: i) a first mode in which the first capacitor is absent from the feedback path of the amplifier during charging of the first capacitor, and ii) a second mode of inserting the charged first capacitor into the feedback path of the amplifier;

the reference voltage generator further comprising:

a second capacitor;

a first current driver;

a first semiconductor device;

a second current driver;

a second semiconductor device; and

wherein, during the first mode, the switch controller is operable to: i) couple the first current driver to the first semiconductor device to generate a first voltage applied to a non-inverting input of the amplifier, and ii) couple the second current driver to the second semiconductor device to generate a second voltage inputted to the second capacitor, the second capacitor coupled to an inverting input of the amplifier;

the reference voltage generator further comprising: a third capacitor; and

wherein during the second mode, the switch controller is operable to couple the second current driver to the first semiconductor device to generate a third voltage, the third voltage being applied to the non-inverting input of the amplifier.

19. A reference voltage generator comprising:

an amplifier;

a first capacitor; and

a switch controller operable to control connectivity of the first capacitor in a feedback path of the amplifier to generate a reference voltage, the switch controller operable to switch between: i) a first mode in which the first capacitor is absent from the feedback path of the amplifier during charging of the first capacitor, and ii) a second mode of inserting the charged first capacitor into the feedback path of the amplifier;

the reference voltage generator further comprising:

a second capacitor;

a first current driver;

a first semiconductor device;

a second current driver;

a second semiconductor device; and

wherein, during the first mode, the switch controller is operable to: i) couple the first current driver to the first semiconductor device to generate a first voltage applied to a non-inverting input of the amplifier, and ii) couple the second current driver to the second semiconductor device to generate a second voltage inputted to the second capacitor, the second capacitor coupled to an inverting input of the amplifier, the method further comprising:

a third capacitor; and

wherein during the second mode, the switch controller is operable to: i) couple the second current driver to the first semiconductor device to generate a third voltage applied to the non-inverting input of the amplifier, and ii) couple the second capacitor in parallel with the third capacitor.

20. The reference voltage generator as in claim 19 , wherein the first current driver is operable to output a first constant current during the first mode; and

wherein the second current driver is operable to output a second constant current during the first mode and the second mode, the second constant current substantially greater than the first constant current.

21. The reference voltage generator as in claim 20 , wherein the first semiconductor device and the second semiconductor device have a substantially same area factor.

22. A method comprising:

generating control signals to control a reference voltage generator, the reference voltage generator including an amplifier and a first capacitor, generation of the control signals including:

during a first mode of controlling the reference voltage generator: i) producing the control signals to disconnect the first capacitor from a feedback path of the amplifier, ii) charging the first capacitor, and iii) inputting a first voltage to a non-inverting input of the amplifier; and

during a second mode of controlling the reference voltage generator: i) inserting the first capacitor into the feedback path of the amplifier to produce a reference voltage, and ii) inputting a second voltage to the non-inverting input of the amplifier;

wherein generating control signals includes: during the first mode, controlling a switch network of the reference voltage generator to: i) couple a first current driver of the reference voltage generator to a first semiconductor device to generate the first voltage inputted to the non-inverting input of the amplifier ii) couple a second current driver of the reference voltage generator to a second semiconductor device to generate a third voltage inputted to a second capacitor of the reference voltage generator, the second capacitor coupled between the second semiconductor device and the inverting input of the amplifier, the method further comprising:

during the second mode, controlling the switch network of the reference voltage generator to: i) couple the second current driver to the first semiconductor device to generate the second voltage inputted to the non-inverting input of the amplifier, and ii) couple the second capacitor in parallel with a third capacitor of the reference voltage generator.

23. The method as in claim 22 , wherein controlling the reference voltage generator during the first mode includes: controlling the first current driver to drive first current through a semiconductor device to generate the first voltage; and

wherein controlling the reference voltage generator during the second mode includes: controlling the second current driver to drive second current through the semiconductor device to generate the second voltage, a magnitude of the second current substantially different than a magnitude of the first current.

24. The method as in claim 22 , further comprising:

during the first mode: operating the amplifier in a unity gain mode in which an output of the amplifier is coupled to an inverting input of the amplifier; and

during the second mode: operating the amplifier in a gain mode in which the first capacitor is coupled between the inverting input of the amplifier and the output of the amplifier.

25. The method as in claim 24 , further comprising:

during the first mode: coupling the first current driver of the reference voltage generator to the first semiconductor device, the first current driver supplying first current through the first semiconductor device during the first mode to generate the first voltage inputted to the non-inverting input of the amplifier.

26. The method as in claim 25 , further comprising:

during the first mode: coupling the second current driver of the reference voltage generator to the second semiconductor device, the second current driver supplying second current through the second semiconductor device during the first mode to generate the third voltage inputted to the second capacitor coupled between the second semiconductor device and the inverting input of the amplifier.

27. The method as in claim 26 , wherein an area factor of the first semiconductor device is substantially equal to an area factor of the second semiconductor device.

28. The method as in claim 22 , further comprising:

switching between operating the reference voltage generator in the first mode and the second mode to produce the reference voltage to be of substantially constant magnitude over a range of temperatures.

29. The method as in claim 22 , further comprising:

controlling the first current driver to output a first constant current during the first mode; and

controlling the second current driver to output a second constant current during the first mode and the second mode, the second constant current being substantially greater in magnitude than the first constant current.