IP Library Granted Patent US 10,756,510
Granted Patent B2
US 10,756,510 · App. 16/243,368 · Granted Aug 25, 2020

Failsafe pulsed laser driver

Inventors: Paul Winer (Santa Clara, CA); Krishna Swaminathan (Santa Clara, CA)
Assignee: Intel Corporation
H01S5/0428G06T7/50H01S5/40H01S5/42H01S5/06825H01S5/423
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Quick Facts
Patent No.
US 10,756,510
App. No.
16/243,368
Granted
Aug 25, 2020
Kind
B2
Abstract

A failsafe pulsed laser driver and method for using the same are disclosed. In one embodiment, an apparatus comprises a laser array having a plurality of lasers; and a laser driver coupled to the laser array, wherein the laser driver comprises a current limiter to provide a maximum current at or below a threshold current of lasers in the laser array or at a current level to meet laser safety requirements under circuit failure conditions; one or more capacitors coupled to current limiter and the laser array, the one or more capacitors to be charged in response to current from the current limiter; and a switch coupled to the one or more capacitors operable to cause current from the one or more capacitors to flow through the laser array.

Claims (34)

1. A laser driver, comprising:

a capacitor to limit current delivered to a vertical cavity surface emitting laser (VCSEL) according an amount of voltage used to charge the capacitor;

a current limited circuit to charge the capacitor via a maximum current at or below a threshold current of the VCSEL; and

a timing circuit to enable a discharge of the capacitor, wherein the timing circuit is programmed based on the amount of voltage used to charge the capacitor.

2. The laser driver of claim 1 , wherein the VCSEL comprises a plurality of lasers.

3. The laser driver of claim 1 , wherein the timing circuit is programmed based on a size of the capacitor.

4. The laser driver of claim 1 , wherein the timing circuit is programmed based on a duration of illumination desired.

5. The laser driver of claim 1 , comprising a switch coupled to the timing circuit coupled to control the switch.

6. The laser driver of claim 1 , wherein the timing circuit is operable to control a pulse width and pulse period of a current pulse discharged by one or more capacitors into a laser array.

7. The laser driver of claim 1 , wherein the current limiter comprises a current limited load switch.

8. The laser driver of claim 1 , wherein the current limiter comprises one or more resistors.

9. The laser driver of claim 1 , wherein the VCSEL comprises a plurality of VCSELs.

10. An apparatus comprising:

a projector configured to project a dot pattern on an object, wherein the projector comprises:

a laser array comprising a plurality of lasers;

a laser driver that comprises:

a capacitor to limit current delivered to the laser array according to an amount of voltage used to charge the capacitor;

a current limited circuit to charge the capacitor via a maximum current at or below a combined-threshold current of the laser array; and

a timing circuit to enable a discharge of the capacitor, wherein the timing circuit is programmed based on the amount of voltage used to charge the capacitor;

a switch coupled to the capacitor operable to cause current from the capacitor to flow through the laser array;

first and second cameras configured to simultaneously capture a pair of images of the object illuminated with the dot pattern; and

a processing unit to receive the captured pair of images and reconstruct depth information using the captured pair of images.

11. The apparatus of claim 10 , wherein the timing circuit is to control the switch.

12. The apparatus of claim 10 , wherein the timing circuit is operable to control a pulse width and pulse period of a current pulse discharged by the capacitor into the laser array.

13. The apparatus of claim 10 , wherein the current limited circuit comprises a current limited load switch.

14. The apparatus of claim 10 , wherein the current limited circuit comprises one or more resistors.

15. The apparatus of claim 10 , wherein the timing circuit is coupled with a switch that comprises a transistor.

16. The apparatus of claim 10 , wherein the timing circuit is programmed based on a size of the capacitor.

17. The apparatus of claim 10 , wherein the timing circuit is programmed based on a duration of illumination desired.

18. A method comprising:

limiting a current delivered to a vertical cavity surface emitting laser (VCSEL) according to an amount of voltage used to charge the capacitor;

charge the capacitor via a current limited circuit with a maximum current at or below a combined threshold current of the VCSEL; and

discharging the capacitor via a timing circuit to illuminate the VCSEL, wherein the timing circuit is programmed based on the amount of voltage used to charge the capacitor.

19. The method of claim 18 , wherein the timing circuit is programmed based on a size of the capacitor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 4, 2026
From: INTEL CORPORATION
To: REALSENSE, INC.
Reel/Frame 074071/0151 →
Continuity (2)
Continuation 15200147 · Jul 1, 2016
Related Publication 20190221996A1 · Jul 18, 2019