Systems and methods for adaptive data storage
A storage module is configured to store data segments, such as error-correcting code (ECC) codewords, within an array comprising two or more solid-state storage elements. The data segments may be arranged in a horizontal arrangement, a vertical arrangement, a hybrid channel arrangement, and/or vertical stripe arrangement within the array. The data arrangement may determine input/output performance characteristics. An optimal adaptive data storage configuration may be based on read and/or write patterns of storage clients, read time, stream time, and so on. Data of failed storage elements may be reconstructed by use of parity data and/or other ECC codewords stored within the array.
1. A method, comprising:
managing, via a storage module, storage operations for a solid-state storage array comprising a plurality of independent data columns, wherein each independent data column comprises a solid-state storage element;
generating, via an error-correcting code (ECC) write module, a plurality of ECC codewords comprising data for storage on the solid-state storage array;
determining, via an adaptive profiling module:
performance metrics corresponding to a plurality of adaptive data storage configurations; and
an optimal adaptive data storage configuration based on the determined performance metrics;
storing, via an adaptive write module, the plurality of ECC codewords on the solid-state storage elements of the solid-state storage array according to the optimal adaptive data storage configuration;
identifying an uncorrectable ECC codeword stored within one of the plurality of solid-state storage elements;
correcting one or more ECC codewords stored within others of the plurality of solid-state storage elements;
generating, via a parity module, respective parity data for the uncorrectable ECC codeword and the corrected ECC codewords; and
reconstructing, via a data reconstruction module, an uncorrectable ECC codeword using the corrected ECC codewords and the respective parity data.
2. The method of claim 1 , further comprising:
detecting, via an ECC read module, the uncorrectable ECC codeword in response to a first read operation;
recovering, via a data recovery module, the uncorrectable ECC codeword by reading other ECC codewords within a vertical stripe with the uncorrectable ECC codewords in a second read operation;
decoding the other ECC codewords; and
reconstructing the uncorrectable ECC codeword using the decoded ECC codewords and parity data of the vertical stripe.
3. The method of claim 1 , further comprising performing, via a grooming module, grooming operations.
4. The method of claim 3 , wherein the grooming operations comprise reclaiming storage resources, erasure, wear leveling, refreshing data stored on the solid-state storage array, or some combination thereof.
5. The method of claim 1 , wherein the solid-state storage array comprises flash memory.
6. The method of claim 1 , wherein the solid-state storage array comprises a plurality of physical storage cells configured for persistent data storage.
7. The method of claim 6 , wherein the plurality of physical storage cells is arranged in groups.
8. The method of claim 7 , wherein each group of the groups comprises a page.
9. The method of claim 7 , wherein the groups are partitioned into storage divisions.
10. The method of claim 9 , wherein each storage division of the storage divisions comprises an erase block.
11. The method of claim 1 , further comprising:
queuing storage requests for the solid-state storage array in an ordered request buffer; and
reordering the storage requests in the ordered request buffer;
wherein:
the storage module comprises the ordered request buffer; and
the ordered request buffer is configured to receive the storage requests from one or more store clients, and to buffer the storage requests received via a bus comprising a peripheral component interconnect express bus.
12. The method of claim 1 , wherein the storage module comprises a logical-to-physical translation layer comprising any-to-any mappings.
13. The method of claim 1 , wherein managing the storage operations for the solid-state storage array further comprises actively scanning the solid-state storage array to identify sections of the solid-state storage array to be taken out of service.
14. The method of claim 1 , wherein:
reconstructing the uncorrectable ECC codeword using the corrected ECC codewords and the respective parity data further comprises reconstructing the uncorrectable ECC codeword based on a horizontal stripe configuration, a vertical stripe configuration, the parity, or some combination thereof; and
wherein:
the plurality of adaptive data storage configurations corresponds to storage of the ECC codewords in one of a horizontal configuration, a vertical configuration, a hybrid configuration, or a vertical stripe configuration.
15. The method of claim 1 , further comprising combining, via an adaptive schedule module, two or more read operations into a combined read operation, wherein the two or more read operations correspond to ECC codewords stored within different sets of the storage elements of the solid-state storage array.
16. An apparatus, comprising:
a bus;
a storage module comprising:
a logical-to-physical translation layer; and
an ordered request buffer;
an error-correcting code (ECC) write module configured to generate a plurality of ECC codewords comprising data for storage on the solid-state storage array;
an adaptive profiling module configured to determine:
performance metrics corresponding to a plurality of adaptive data storage configurations; and
an optimal adaptive data storage configuration based on the determined performance metrics;
an adaptive write module configured to store the plurality of ECC codewords within a plurality of solid-state storage elements of the solid-state storage array according to the optimal adaptive data storage configuration;
a parity module configured to generate respective parity data for an uncorrectable ECC codeword stored within one of the plurality of solid-state storage elements and a plurality of correctable ECC codewords stored within others of the plurality of solid-state storage elements; and
a data reconstruction module configured to reconstruct the uncorrectable ECC codeword using the correctable ECC codewords and the respective parity data.
17. The apparatus of claim 16 , further comprising:
an ECC read module configured to detect the uncorrectable ECC codeword in response to a first read operation; and
a data recovery module configured to:
recover the uncorrectable ECC codeword by reading other ECC codewords within a vertical stripe with the uncorrectable ECC codeword in a second read operation;
decode the other ECC codewords; and
reconstruct the uncorrectable ECC codeword using the decoded ECC codewords and parity data of the vertical stripe.
18. The apparatus of claim 16 , further comprising a groomer module configured to perform grooming operations.
19. The apparatus of claim 18 , wherein the grooming operations comprise reclaiming storage resources, erasure, wear leveling, refreshing data stored on the solid-state storage array, or some combination thereof.
20. The apparatus of claim 16 , wherein the solid-state storage array comprises flash memory.
21. The apparatus of claim 16 , wherein the solid-state storage array comprises a plurality of physical storage cells configured for persistent data storage.
22. The apparatus of claim 21 , wherein the plurality of physical storage cells is arranged in groups.
23. The apparatus of claim 22 , wherein each group of the groups comprises a page.
24. The apparatus of claim 22 , wherein the groups are partitioned into storage divisions.
25. The apparatus of claim 24 , wherein each storage division of the storage divisions comprises an erase block.
26. The apparatus of claim 16 , wherein the bus comprises a peripheral component interconnect express bus.
27. The apparatus of claim 16 , wherein the logical-to-physical translation layer comprises any-to-any mappings.
28. The apparatus of claim 16 , wherein the storage module is configured to actively scan the solid-state storage array to identify sections of the solid-state storage array to be taken out of service.
29. The apparatus of claim 16 , wherein the data reconstruction module is configured to reconstruct the uncorrectable ECC codeword based on a horizontal stripe configuration, a vertical stripe configuration, the parity, or some combination thereof.
30. The apparatus of claim 16 , further comprising an adaptive schedule module configured to combine two or more read operations into a combined read operation, wherein the two or more read operations correspond to ECC codewords stored within different sets of storage elements of the solid-state storage array.