IP Library Granted Patent US 10,643,940
Granted Patent B2
US 10,643,940 · App. 16/245,549 · Granted May 5, 2020

Electronic device with die being sunk in substrate

Inventors: Fulvio Vittorio Fontana (Monza, IT); Giovanni Graziosi (Vimercate, IT)
Assignee: STMicroelectronics S.r.l.
H01L23/49838H01L21/4857H01L21/52H01L23/367H01L23/3677H01L23/49827H01L23/5389H01L24/19H01L2224/0401H01L2224/04105H01L2224/16227H01L2224/16235H01L2224/18H01L2224/32245H01L2224/73253H01L2224/73267H01L2224/92144H01L2224/92244H01L2924/15153H01L2924/16195H01L2924/18162
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Quick Facts
Patent No.
US 10,643,940
App. No.
16/245,549
Granted
May 5, 2020
Kind
B2
Abstract

A method for forming an electronic device includes embedding an integrated circuit die in a package including substrate of thermally conductive material with front and back surfaces and a through-hole. The die is sunk in the through-hole. A first insulating material layer covers the die front surface and the package front surface with first windows for accessing die terminals. Package terminals and package track are arranged on the first insulating layer. A second insulating material layer covers the first insulating layer and the package tracks with second windows for accessing the package terminals.

Claims (36)

1. A method for manufacturing an electronic device, comprising:

mounting a back surface of a die to a mounting surface of a cap, said die including an integrated circuit, a front surface opposite the back surface, and one or more die terminals on the front surface for accessing the integrated circuit;

providing a package substrate having a package front surface and a package back surface opposed to each other and a through-hole crossing the package substrate between the package front surface and the package back surface;

mounting the package back surface of the package substrate to the cap with the die positioned within the through-hole crossing the package substrate;

applying a first insulating layer of electrically insulating material onto the package front surface and the front surface of the die;

opening one or more first windows in the first insulating layer with each first window accessing a corresponding one of the die terminals;

forming one or more package terminals and one or more package tracks of electrically conductive material onto the first insulating layer, each package track electrically coupling a corresponding one of the package terminals with at least a corresponding one of the die terminals; and

applying a second insulating layer of electrically insulating material onto the first insulating layer and the package tracks, the second insulating layer having one or more second windows with each second window accessing a corresponding one of the package terminals.

2. The method of claim 1 , wherein the first insulating layer comprises a B-stageable adhesive.

3. The method of claim 1 , further comprising curing the first insulating layer to attach the front surface of the die to the first insulating layer.

4. The method of claim 1 , further comprising depositing a thermally conductive material into a gap between peripheral surfaces of the die and the package substrate.

5. The method of claim 4 , wherein the thermally conductive material is silicone.

6. The method of claim 1 , wherein applying the second insulating layer comprises solder mask screening.

7. The method of claim 1 , further comprising positioning the die within the through-hole such that said die front surface and die back surface are coplanar to the package front surface and to the package back surface, respectively.

8. A method for manufacturing an electronic device, comprising:

providing a package substrate having a package front surface and a package back surface opposed to each other, and at least one through-hole crossing the package substrate between the package front surface and the package back surface;

attaching a die to a cap, said die including an integrated circuit, a die front surface and a die back surface opposed to each other, and one or more die terminals on the die front surface for accessing the integrated circuit;

mounting the package substrate to the cap with the die positioned within the through-hole in a position where the die front surface is coplanar to the package front surface;

applying a first insulating layer of electrically insulating material onto the package front surface and die front surface;

opening one or more first windows in the first insulating layer with each first window accessing a corresponding one of the die terminals;

forming one or more package terminals and one or more package tracks of electrically conductive material onto the first insulating layer, each package track electrically coupling a corresponding one of the package terminals with at least a corresponding one of the die terminals; and

applying a second insulating layer of electrically insulating material onto the first insulating layer and the package tracks, the second insulating layer having one or more second windows with each second window accessing a corresponding one of the package terminals.

9. The method of claim 8 , further comprising depositing a thermally conductive material into a gap between peripheral surfaces of the die and the package substrate.

10. The method of claim 9 , wherein the deposited thermally conductive material is silicone.

11. A method for manufacturing an electronic device, comprising:

providing a package substrate having a package front surface and a package back surface opposed to each other and at least one through-hole crossing the package substrate between the package front surface and the package back surface;

inserting a die within the through-hole, said die including an integrated circuit, a die front surface and a die back surface opposed to each other, and one or more die terminals on the die front surface for accessing the integrated circuit, said die terminals facing the first insulating layer;

applying a first insulating layer of electrically insulating material onto the package front surface and die front surface;

opening one or more first windows in the first insulating layer with each first window accessing a corresponding one of the die terminals;

forming one or more package terminals and one or more package tracks of electrically conductive material onto the first insulating layer, each package track electrically coupling a corresponding one of the package terminals with at least a corresponding one of the die terminals; and

applying a second insulating layer of electrically insulating material onto the first insulating layer and the package tracks, the second insulating layer having one or more second windows with each second window accessing a corresponding one of the package terminals.

12. The method of claim 11 , further comprising mounting a cap to the die back surface.

13. The method of claim 12 , further comprising mounting the cap to the package back surface.

14. The method of claim 11 , wherein the first insulating layer comprises a B-stageable adhesive.

15. The method of claim 11 , further comprising depositing a thermally conductive material into a gap between peripheral sidewalls of the integrated circuit die and the package substrate.

16. The method of claim 15 , wherein the thermally conductive material is silicone.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 1, 2022
From: STMICROELECTRONICS S.R.L.
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 061828/0243 →
Priority Claims (1)
IT MI2014A1095 · Jun 17, 2014 · national
Continuity (3)
Continuation 15616009 · Jun 7, 2017
Division 14733209 · Jun 8, 2015
Related Publication 20190148282A1 · May 16, 2019