IP Library Patent Application 16247171
Patent Application
App. No. 16/247,171

CSI-RS SEQUENCE GENERATION AND MAPPING AND DMRS SCRAMBLING ID CONFIGURATION

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Quick Facts
Patent No.
US None
App. No.
16/247,171
Abstract

In some embodiments, an apparatus of a Fifth Generation (5G) NodeB (gNB) comprises one or more baseband processors to encode one or more channel state information reference signals (CSI-RS) to be transmitted to a user equipment (UE). The one or more CSI-RS signals comprise a complex sequence mapped to a resource element (RE) such that all CSI-RS ports use an identical sequence for the one or more CSI-RS signals in a symbol. In other embodiments, the gNB comprises one or more baseband processors to encode a scrambling identity (ID) configuration for one or more demodulation reference signals (DMRS), wherein the scrambling ID configuration indicates one of two scrambling IDs to be signaled to a UE.

Claims (30)

1 . An apparatus of a Fifth Generation (5G) NodeB (gNB), comprising:

one or more baseband processors to encode one or more channel state information reference signals (CSI-RS) to be transmitted to a user equipment (UE), wherein the one or more CSI-RS signals comprise a complex sequence mapped to a resource element (RE) such that all CSI-RS ports use an identical sequence for the one or more CSI-RS signals in a symbol; and

a memory to store the one or more CSI-RS signals.

2 . The apparatus of claim 1 , wherein different resource elements occupied by a CSR-RS port have different complex values for the complex sequence.

3 . The apparatus of claim 1 , wherein the complex sequence comprises a Gold sequence quadrature phase shift keying (QPSK) sequence.

4 . The apparatus of claim 1 , further comprising a transceiver to transmit the one or more CSI-RS signals to the UE and to receive a channel state information (CSI) report from the UE in response to the one or more CSI-RS signals.

5 . An apparatus of a user equipment (UE), comprising:

one or more baseband processors to decode one or more channel state information reference signals (CSI-RS) received from a Fifth Generation (5G) NodeB (gNB), wherein the one or more CSI-RS signals comprise a complex sequence mapped to a resource element (RE) such that all CSI-RS ports use an identical sequence for the one or more CSI-RS signals in a symbol; and

a memory to store the one or more CSI-RS signals.

6 . The apparatus of claim 5 , wherein different resource elements occupied by a CSR-RS port have different complex values for the complex sequence.

7 . The apparatus of claim 5 , wherein the complex sequence comprises a Gold sequence quadrature phase shift keying (QPSK) sequence.

8 . The apparatus of claim 5 , further comprising a transceiver to receive the one or more CSI-RS signals from the gNB, and to transmit a channel state information (CSI) report to the gNB in response to the one or more CSI-RS signals.

9 . One or more non-transitory storage media having instructions stored thereon that, when executed by an apparatus of a Fifth Generation (5G) NodeB (gNB), result in:

encoding one or more channel state information reference signals (CSI-RS) to be transmitted to a user equipment (UE), wherein the one or more CSI-RS signals comprises a complex sequence mapped to a resource element (RE) such that all CSI-RS ports use an identical sequence for the CSI-RS in symbol; and

processing a channel state information (CSI) report received from the UE in response to the one or more CSI-RS signals

10 . The one or more non-transitory storage media of claim 9 , wherein different resource elements occupied by a CSR-RS port have different complex values for the complex sequence.

11 . The one or more non-transitory storage media of claim 9 , wherein the complex sequence comprises a Gold sequence quadrature phase shift keying (QPSK) sequence.

12 . An apparatus of a Fifth Generation (5G) NodeB (gNB), comprising:

one or more baseband processors to encode a scrambling identity (ID) configuration for one or more demodulation reference signals (DMRS), wherein the scrambling ID configuration indicates one of two scrambling IDs to be signaled to a user equipment (UE); and

a memory to store the scrambling ID configuration.

13 . The apparatus of claim 12 , wherein the scrambling ID configuration is to be signaled as part of a channel state information reference signal (CSI-RS) configuration.

14 . The apparatus of claim 12 , wherein the signaling is performed as a part of a synchronization signal block (SSB) configuration.

15 . The apparatus of claim 12 , wherein the scrambling ID configuration indicates one of two 16-bit scrambling IDs

16 . The apparatus of claim 12 , wherein the scrambling ID configuration comprises a value indicated by a transmission configuration indication (TCI) state in downlink control information (DCI) when parameter TCI-PresentInDCI is enabled, wherein the TCI state is signaled in the DCI associated with ControlResourceSet (CORESET) scheduling a physical downlink shared channel (PDSCH) or a physical uplink shared channel (PUSCH).

17 . The apparatus of claim 17 , wherein the scrambling ID configuration comprises a value of 0 when parameter TCI-PresentInDCI is disabled.

18 . One or more non-transitory storage media having instructions stored thereon that, when executed by an apparatus of a Fifth Generation (5G) NodeB (gNB), result in:

encoding a scrambling identity (ID) configuration for one or more demodulation reference signals (DMRS), wherein the scrambling ID configuration indicates one of two scrambling IDs to be signaled to a user equipment (UE) using 1-bit in downlink control information (DCI) associated with ControlResourceSet (CORESET) scheduling a physical downlink shared channel (PDSCH) or a physical uplink shared channel (PUSCH); and

transmitting the scrambling ID configuration to the UE.

19 . The one or more non-transitory storage media of claim 18 , wherein the scrambling ID configuration is to be signaled as part of a channel state information reference signal (CSI-RS) configuration.

20 . The one or more non-transitory storage media of claim 18 , wherein the signaling is performed as a part of a synchronization signal block (SSB) configuration.

Assignments (3)
CONFIRMATORY ASSIGNMENT Recorded Aug 11, 2020
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 053455/0489 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2020
From: INTEL CORPORATION
To: APPLE INC.
Reel/Frame 053065/0418 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2019
From: PAWAR, SAMEER; SENGUPTA, AVIK; DAVYDOV, ALEXEI
To: INTEL IP CORPORATION
Reel/Frame 048252/0349 →