IP Library Patent Application 16252497
Patent Application
App. No. 16/252,497

TEST AND MEASUREMENT INSTRUMENT WITH BUFFER MODEL DELAY COMPENSATION

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Quick Facts
Patent No.
US None
App. No.
16/252,497
Abstract

A test and measurement instrument, including one or more ports configured to receive a stream of packets from a transmitter through a network component, each packet including a timestamp; and one or more processors. The one or more processors are configured to select a buffer model, the buffer model including one or more validation thresholds for a buffer fullness, determine a network delay based on the timestamp in each packet and when the packet was received at the one or more ports, and compensate the buffer model based on the network delay to determine a buffer fullness value based on the stream of packets. The test and measurement instrument also includes a display to display an indication of whether the transmitter complies with the selected buffer model, so a user can confirm whether a transmitter being tested complies with applicable standards.

Claims (37)

1 . A test and measurement instrument, comprising:

one or more ports configured to receive a stream of packets from a transmitter through a network component, each packet including a timestamp; and

one or more processors configured to:

select a buffer model, the buffer model including one or more validation thresholds for a buffer fullness;

perform a buffer analysis based on the selected model and the stream of packets;

determine a network delay based on the timestamp in each packet and when the packet was received at the one or more ports, and

compensate the buffer model based on the network delay to determine a buffer fullness value based on the stream of packets; and

a display configured to display an indication of whether the transmitter complies with the selected buffer model.

2 . The test and measurement instrument of claim 1 , wherein the one or more processors are further configured to convert the network delay to a number of packets based on a mean time between packets and compensate the buffer model based on the number of packets.

3 . The test and measurement instrument of claim 2 , wherein the one or more processors are further configured to compensate the buffer model by adjusting the one or more validation thresholds for the buffer fullness based on the number of packets.

4 . The test and measurement instrument of claim 3 , wherein adjusting the one or more validation thresholds for the buffer fullness based on the number of packets includes subtracting the number of packets from the one or more validation threshold.

5 . The test and measurement instrument of claim 2 , wherein the one or more processors are further configured to compensate the buffer model by modifying the buffer fullness value based on the number of packets.

6 . The test and measurement instrument of claim 5 , wherein modifying the buffer fullness value includes adding the number of packets to the buffer fullness value determined based on the stream of packets.

7 . The test and measurement instrument of claim 1 , further comprising a memory to store a plurality of buffer models, and the one or more processors are further configured to select the buffer model from the memory based on an input from a user.

8 . A method, comprising:

receiving a stream of packets from a transmitter through a network component, each packet including a timestamp;

selecting a buffer model for the transmitter, the buffer model including one or more validation thresholds for a buffer fullness;

performing a buffer analysis based on the selected buffer model and the stream of packets;

determining a network delay based on the timestamp in each packet and when the packet was received at the one or more ports; and

compensating the buffer model based on the network delay to determine a buffer fullness value based on the stream of packets.

9 . The method of claim 8 , further comprising converting the network delay to a number of packets based on a mean time between packets and compensating the buffer model based on the number of packets.

10 . The method of claim 9 , in which compensating the buffer model includes adjusting the one or more validation thresholds for the buffer fullness based on the number of packets.

11 . The method of claim 10 , wherein adjusting the one or more validation thresholds for the buffer fullness based on the number of packets includes subtracting the number of packets from the one or more validation thresholds.

12 . The method of claim 9 , in which compensating the buffer model includes modifying the buffer fullness value based on the number of packets.

13 . The method of claim 12 , wherein modifying the buffer fullness value includes adding the number of packets to the buffer fullness value determined based on the stream of packets.

14 . The method of claim 8 , further comprising storing a plurality of buffer models in a memory, and selecting the buffer model from the memory based on an input from a user.

15 . One or more computer-readable storage media comprising instructions, which, when executed by one or more processors of a test and measurement instrument, cause the test and measurement instrument to:

receive a stream of packets from a transmitter through a network component, each packet including a timestamp;

select a buffer model based on the transmitter, the buffer model including one or more validation thresholds for a buffer fullness;

perform a buffer analysis based on the selected buffer model and the stream of packets;

determine a network delay based on the timestamp in each packet and when the packet was received at the one or more ports; and

compensate the buffer model based on the network delay to determine a buffer fullness value based on the stream of packets.

16 . The one or more computer-readable storage media of claim 15 , further comprising instructions to cause the test and measurement instrument to convert the network delay to a number of packets based on a mean time between packets and compensating the buffer model based on the number of packets.

17 . The one or more computer-readable storage media of claim 16 , further comprising instructions to cause the test and measurement instrument to compensate the buffer model by adjusting the one or more validation thresholds for the buffer fullness based on the number of packets.

18 . The one or more computer-readable storage media of claim 17 , wherein adjusting the one or more validation thresholds for the buffer fullness based on the number of packets includes subtracting the number of packets from the one or more validation threshold.

19 . The one or more computer-readable storage media of claim 16 , further comprising instructions to cause the test and measurement instrument to compensate the buffer model by modifying the buffer fullness value based on the number of packets.

20 . The one or more computer-readable storage media of claim 19 , wherein modifying the buffer fullness value includes adding the number of packets to the buffer fullness value determined based on the stream of packets.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE MISSING PROPERTY AND GRANTOR NAME OF PROJECT GIANTS. LLC PREVIOUSLY RECORDED AT REEL: 054089 FRAME: 0786. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 1, 2021
From: PROJECT GIANTS, LLC
To: FORTRESS CREDIT CORP., AS AGENT
Reel/Frame 056442/0845 →
RELEASE OF SECURITY INTEREST Recorded Oct 16, 2020
From: SILICON VALLEY BANK
To: PROJECT GIANTS, LLC
Reel/Frame 054090/0934 →
SECURITY INTEREST Recorded Oct 15, 2020
From: PROJECT GIANT, LLC
To: FORTRESS CREDIT CORP., AS AGENT
Reel/Frame 054089/0786 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 25, 2019
From: TEKTRONIX, INC.
To: PROJECT GIANTS, LLC
Reel/Frame 049870/0073 →
PATENT SECURITY AGREEMENT Recorded Jul 22, 2019
From: PROJECT GIANTS, LLC
To: SILICON VALLEY BANK
Reel/Frame 049819/0702 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 21, 2019
From: OVERTON, MICHAEL S.
To: TEKTRONIX, INC
Reel/Frame 048075/0340 →