IP Library Granted Patent US 11,121,789
Granted Patent B2
US 11,121,789 · App. 16/259,021 · Granted Sep 14, 2021

Method and system for integrated stacking for handling channel stacking or band stacking

Inventors: Glenn Chang (Carlsbad, CA); Brian Sprague (Irvine, CA); Madhukar Reddy (Carlsbad, CA)
Assignee: ENTROPIC COMMUNICATIONS, LLC
H04H40/90H04H20/63H04N7/106H04N7/22H04N21/40H04N21/41H04N21/4108H04N21/42684H04N21/43615H04N21/45H04N21/60H04N21/61H04N21/63H04N21/633H04N21/637H04N21/6332H04N21/6377H04N21/64H04N21/6402H04N21/6405H04N21/647H04N21/6408H04N21/64746H04N21/64753H04N21/64761
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,121,789
App. No.
16/259,021
Granted
Sep 14, 2021
Kind
B2
Abstract

Methods and systems are provided for integrated channel and/or band stacking solutions. A plurality of signals may be received, such as via a signal receiver, with each of the received signals being different from remaining ones of the plurality signals. At least two received signals may be processed, such as via one or more processing circuits, and an output signal may be generated based on the processing of the at least two received signals. The output signal may include only one or more portions from each of the at least two signals, with the one or more portions being stacked within the output signal. The stacking of the one or more portions from the at least two signals may include applying channel equalization, with the channel equalization including equalizing power of a plurality of sub-components of a frequency band corresponding to the one or more portions.

Claims (21)

1. A system, comprising:

a signal receiver that is configured to receive a plurality of signals; and

one or more signal processing circuits configured to:

process at least two signals from the plurality of signals, wherein the two signals are different from one another based on at least one characteristic or parameter; and

generate an output signal based on the processing of the at least two signals, wherein:

the output signal comprises only one or more portions from each of the at least two signals;

generating the output signal comprises stacking one or more portions from each of the at least two signals within the output signal;

the stacking comprises applying channel equalization; and

the channel equalization comprises applying power equalization, the power equalization being configured to prevent leakage of power from at least one frequency into adjacent frequencies across an entire frequency band corresponding to the one or more portions in at least one of the at least two signals.

2. The system of claim 1 , wherein the one or more signal processing circuits apply the channel equalization separately to at least two equalization inputs, wherein each of the at least two equalization inputs corresponds to one of the at least two signals.

3. The system of claim 2 , wherein the one or more signal processing circuits generate each of the at least two equalization inputs based on processing of a corresponding one of the at least two signals.

4. The system of claim 1 , wherein processing each of the at least two signals comprises applying one or more of: amplification, mixing, filtering, and analog-to-digital conversion.

5. The system of claim 1 , wherein the channel equalization is applied in frequency-domain, and the one or more signal processing circuits, when applying the channel equalization:

apply frequency-domain equalization;

apply a fast Fourier transform (FFT) function before frequency-domain equalization; and

apply an inverse fast Fourier transform (iFFT) function after frequency-domain equalization.

6. The system of claim 1 , wherein the one or more signal processing circuits are configured to apply the power equalization over a plurality of frequencies within a frequency band corresponding to the one or more portions in at least one of the at least two signals.

7. The system of claim 1 , wherein the signal receiver communicate the output signal to a device that distribute content from the output signal.

8. The system of claim 1 , wherein the signal receiver communicates the output signal over a single link that is configured based on one or more of: a coaxial cable connection, a twisted-pair connection, a Multimedia over Coax Alliance (MoCA) connection, an Ethernet connection, or a Direct Broadcast Satellite (DBS) based connection.

9. The system of claim 8 , wherein the one or more signal processing circuits combine the one or more portions from each of the at least two received signals based on configuration of the single link.

10. The system of claim 1 , wherein the one or more signal processing circuits is housed in the signal receiver.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Jun 23, 2021
From: MUFG UNION BANK, N.A.
To: MAXLINEAR, INC.; EXAR CORPORATION; MAXLINEAR COMMUNICATIONS LLC
Reel/Frame 056656/0204 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 12, 2021
From: MAXLINEAR, INC.
To: ENTROPIC COMMUNICATIONS, LLC
Reel/Frame 055898/0230 →
RELEASE OF SECURITY INTEREST Recorded Mar 31, 2021
From: MUFG UNION BANK, N.A.
To: MAXLINEAR, INC.; MAXLINEAR COMMUNICATIONS LLC
Reel/Frame 055779/0001 →
SUCCESSION OF AGENCY (REEL 052777 / FRAME 0216) Recorded Jul 1, 2020
From: JPMORGAN CHASE BANK, N.A.
To: MUFG UNION BANK, N.A.
Reel/Frame 053116/0418 →
SECURITY AGREEMENT Recorded May 28, 2020
From: MAXLINEAR, INC.; ENTROPIC COMMUNICATIONS, LLC; EXAR CORPORATION
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 052777/0216 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 28, 2019
From: CHANG, GLENN; SPRAGUE, BRIAN; REDDY, MADHUKAR
To: MAXLINEAR, INC.
Reel/Frame 048154/0821 →