IP Library Granted Patent US 11,029,971
Granted Patent B2
US 11,029,971 · App. 16/259,608 · Granted Jun 8, 2021

Automated resource usage configurations for deep learning neural network workloads on multi-generational computing architectures

Inventors: Meenakshi Arunachalam (Portland, OR); Kushal Datta (Hillsboro, OR); Vikram Saletore (Hillsboro, OR); Vishal Verma (Chandler, AZ); Deepthi Karkada (Charlotte, NC); Vamsi Sripathi (Hillsboro, OR); Rahul Khanna (Portland, OR); Mohan Kumar (Aloha, OR)
Assignee: Intel Corporation
G06F9/44505G06F9/505G06N3/04G06N5/04
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Quick Facts
Patent No.
US 11,029,971
App. No.
16/259,608
Granted
Jun 8, 2021
Kind
B2
Abstract

Systems, apparatuses and methods may provide for technology that identifies a first set of compute nodes and a second set of compute nodes, wherein the first set of compute nodes execute more slowly than the second set of compute nodes. The technology may also automatically determine a compute node configuration that results in a relatively low difference in completion time between the first set of compute nodes and the second set of compute nodes with respect to a neural network workload. In an example, the technology applies the compute node configuration to an execution of the neural network workload on one or more nodes in the first set of compute nodes and one or more nodes in the second set of compute nodes.

Claims (50)

1. A computing system comprising:

a network controller;

a processor coupled to the network controller; and

a memory coupled to the processor, the memory including a set of executable program instructions, which when executed by the processor, cause the computing system to:

identify a first set of compute nodes and a second set of compute nodes, wherein the first set of compute nodes execute more slowly than the second set of compute nodes;

enumerate possible configuration combinations for the first set of compute nodes and the second set of compute nodes, wherein the possible configuration combinations include a first possible configuration combination and a second possible configuration combination;

measure a throughput and a completion time associated with each of the possible configuration combinations;

identify a difference in completion times for the first set of compute nodes and the second set of compute nodes for each of the possible configuration combinations, wherein the difference in the completion time of the first possible configuration combination is to be higher than the difference in the completion time of the second possible configuration combination;

conduct an identification that the first possible configuration combination has a relatively high throughput;

determine that a compute node configuration is to be the first possible configuration combination based on the differences in completion times and the identification, wherein the compute node configuration results in a relatively low difference in completion time between the first set of compute nodes and the second set of compute nodes with respect to a neural network workload; and

apply the compute node configuration to an execution of the neural network workload on one or more nodes in the first set of compute nodes and one or more nodes in the second set of compute nodes.

2. The system of claim 1 , wherein the compute node configuration is to specify a local number of processes on the first set of compute nodes, a local batch size for the first set of compute nodes, a local number of processes on the second set of compute nodes, and a local batch size for the second set of compute nodes.

3. The system of claim 1 , wherein the neural network workload is to be a training workload, and the relatively low difference in completion time reduces a synchronization time between the first set of compute nodes and the second set of compute nodes.

4. The system of claim 1 , wherein the neural network workload is to be an inference workload.

5. A semiconductor package comprising:

one or more substrates; and

logic coupled to the one or more substrates, wherein the logic is implemented at least partly in one or more of configurable logic or fixed-functionality hardware logic, the logic coupled to the one or more substrates to:

identify a first set of compute nodes and a second set of compute nodes, wherein the first set of compute nodes execute more slowly than the second set of compute nodes,

enumerate possible configuration combinations for the first set of compute nodes and the second set of compute nodes, wherein the possible configuration combinations include a first possible configuration combination and a second possible configuration combination;

measure a throughput and a completion time associated with each of the possible configuration combinations;

identify a difference in completion times for the first set of compute nodes and the second set of compute nodes for each of the possible configuration combinations, wherein the difference in the completion time of the first possible configuration combination is to be higher than the difference in the completion time of the second possible configuration combination;

conduct an identification that the first possible configuration combination has a relatively high throughput;

determine that a compute node configuration is to be the first possible configuration combination based on the differences in completion times and the identification, wherein the compute node configuration results in a relatively low difference in completion time between the first set of compute nodes and the second set of compute nodes with respect to a neural network workload, and

apply the compute node configuration to an execution of a neural network workload on one or more nodes in the first set of compute nodes and one or more nodes in the second set of compute nodes.

6. The semiconductor package of claim 5 , wherein the compute node configuration is to specify a local number of processes on the first set of compute nodes, a local batch size for the first set of compute nodes, a local number of processes on the second set of compute nodes, and a local batch size for the second set of compute nodes.

7. The semiconductor package of claim 5 , wherein the neural network workload is to be a training workload, and the relatively low difference in completion time reduces a synchronization time between the first set of compute nodes and the second set of compute nodes.

8. The semiconductor package of claim 5 , wherein the neural network workload is to be an inference workload.

9. The semiconductor package of claim 5 , wherein the logic coupled to the one or more substrates includes transistor channel regions that are positioned within the one or more substrates.

10. At least one non-transitory computer readable storage medium comprising a set of executable program instructions, which when executed by a computing system, cause the computing system to:

identify a first set of compute nodes and a second set of compute nodes, wherein the first set of compute nodes execute more slowly than the second set of compute nodes;

enumerate possible configuration combinations for the first set of compute nodes and the second set of compute nodes, wherein the possible configuration combinations include a first possible configuration combination and a second possible configuration combination;

measure a throughput and a completion time associated with each of the possible configuration combinations;

identify a difference in completion times for the first set of compute nodes and the second set of compute nodes for each of the possible configuration combinations, wherein the difference in the completion time of the first possible configuration combination is to be higher than the difference in the completion time of the second possible configuration combination;

conduct an identification that the first possible configuration combination has a relatively high throughput;

determine that a compute node configuration is to be the first possible configuration combination based on the differences in completion times and the identification, wherein the compute node configuration results in a relatively low difference in completion time between the first set of compute nodes and the second set of compute nodes with respect to a neural network workload; and

apply the compute node configuration to an execution of the neural network workload on one or more nodes in the first set of compute nodes and one or more nodes in the second set of compute nodes.

11. The at least one non-transitory computer readable storage medium of claim 10 , wherein the compute node configuration is to specify a local number of processes on the first set of compute nodes, a local batch size for the first set of compute nodes, a local number of processes on the second set of compute nodes, and a local batch size for the second set of compute nodes.

12. The at least one non-transitory computer readable storage medium of claim 10 , wherein the neural network workload is to be a training workload, and the relatively low difference in completion time reduces a synchronization time between the first set of compute nodes and the second set of compute nodes.

13. The at least one non-transitory computer readable storage medium of claim 10 , wherein the neural network workload is to be an inference workload.

14. A method comprising:

identifying a first set of compute nodes and a second set of compute nodes, wherein the first set of compute nodes execute more slowly than the second set of compute nodes;

enumerating possible configuration combinations for the first set of compute nodes and the second set of compute nodes, wherein the possible configuration combinations include a first possible configuration combination and a second possible configuration combination;

measuring a throughput and a completion time associated with each of the possible configuration combinations;

identifying a difference in completion times for the first set of compute nodes and the second set of compute nodes for each of the possible configuration combinations, wherein the difference in the completion time of the first possible configuration combination is higher than the difference in the completion time of the second possible configuration combination;

conducting an identification that the first possible configuration combination has a relatively high throughput;

determining that a compute node configuration is the first possible configuration combination based on the differences in completion times and the identification, wherein the compute node configuration results in a relatively low difference in completion time between the first set of compute nodes and the second set of compute nodes with respect to a neural network workload; and

applying the compute node configuration to an execution of the neural network workload on one or more nodes in the first set of compute nodes and one or more nodes in the second set of compute nodes.

15. The method of claim 14 , wherein the compute node configuration specifies a local number of processes on the first set of compute nodes, a local batch size for the first set of compute nodes, a local number of processes on the second set of compute nodes, and a local batch size for the second set of compute nodes.

16. The method of claim 14 , wherein the neural network workload is a training workload, and the relatively low difference in completion time reduces a synchronization time between the first set of compute nodes and the second set of compute nodes.

17. The method of claim 14 , wherein the neural network workload is an inference workload.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 28, 2019
From: ARUNACHALAM, MEENAKSHI; DATTA, KUSHAL; SALETORE, VIKRAM; VERMA, VISHAL; KARKADA, DEEPTHI; SRIPATHI, VAMSI; KHANNA, RAHUL; KUMAR, MOHAN
To: INTEL CORPORATION
Reel/Frame 048159/0074 →
Continuity (1)
Related Publication 20190155620A1 · May 23, 2019