Fabrication of optical metasurfaces
The method is provided for fabricating an optical metasurface. The method may include depositing a conductive layer over a holographic region of a wafer and depositing a dielectric layer over the conducting layer. The method may also include patterning a hard mask on the dielectric layer. The method may further include etching the dielectric layer to form a plurality of dielectric pillars with a plurality of nano-scale gaps between the pillars.
1. A method for fabricating dielectric pillars having a nano-scale gap inbetween, the method comprising:
depositing a dielectric layer over a conducting layer;
patterning a hard mask on the dielectric layer by a high resolution process; and
applying a plasma to etch a portion of a dielectric layer at a temperature below room temperature in a chamber to form dielectric pillars with the nano-scale gap.
2. The method of claim 1 , wherein the nano-scale gap has an aspect ratio of at least 5.
3. The method of claim 2 , wherein the sidewall angle ranges between 80° and 100°.
4. The method of claim 1 , wherein the plasma comprises a mixture of gases.
5. The method of claim 4 , wherein the mixture of gases comprises SF 6 gas for anisotropic etching.
6. The method of claim 4 , wherein the mixture of gases comprises C 4 F 8 gas for reducing the etching rate isotropically.
7. The method of claim 6 , further comprising increasing the concentration of the C 4 F 8 gas to reduce the undercut of the dielectric pillars.
8. The method of claim 7 , further comprising decreasing the concentration of the C 4 F 8 gas to reduce the sidewall angle of the dielectric pillars from the conducting layer.
9. The method of claim 1 , further comprising adjusting the pressure of the chamber to reduce the undercut of the dielectric pillars.
10. The method of claim 1 , further comprising adjusting the power of the plasma to reduce the undercut of the dielectric pillars.
11. The method of claim 1 , wherein the dielectric layer comprises amorphous silicon.
12. The method of claim 1 , the step of patterning a hard mask on the dielectric layer by a high resolution process comprising:
depositing a hard mask over the dielectric layer;
patterning the hard mask by a low resolution process to remove a first portion of the mask near a wire contact region;
patterning the hard mask to form the nano-scale gap by a high resolution process;
applying a plasma to etch the hard mask to remove a second portion of the hard mask in the nano-scale gap to expose the dielectric layer.
13. The method of claim 12 , wherein the hard mask comprises Al 2 O 3 .
14. The method of claim 12 , wherein the high resolution process comprises e-beam lithography.
15. The method of claim 12 , wherein the high resolution process comprises deep UV immersion lithography.