Semiconductor device including multiple chips
A semiconductor device includes a first semiconductor chip, a second semiconductor chip thicker than the first semiconductor chip, a plurality of bumps provided between the first and second semiconductor chips and electrically connecting the first and second semiconductor chips, an adhesive resin provided between the first and second semiconductor chips and bonding the first and second semiconductor chips, and a sealing resin encapsulating the first and second semiconductor chips. At least one of the first and second semiconductor chips has an organic protective film disposed thereon.
1. A semiconductor device comprising:
a wiring substrate;
a first semiconductor chip provided on the wiring substrate;
a second semiconductor chip provided on the wiring substrate, the second semiconductor chip having a substantially same size as the first semiconductor chip but thicker than the first semiconductor chip;
a plurality of bumps provided between the first and second semiconductor chips and electrically connecting the first and second semiconductor chips;
an adhesive resin provided between the first and second semiconductor chips and bonding the first and second semiconductor chips; and
a sealing resin encapsulating the first and second semiconductor chips,
wherein at least one of the first semiconductor chip or second semiconductor chip has an organic protective film disposed thereon, and
wherein a distance between the wiring substrate and the second semiconductor chip is shorter than a distance between the wiring substrate and the first semiconductor chip.
2. The semiconductor device according to claim 1 , wherein each of the first and second semiconductor chips is a memory chip.
3. The semiconductor device according to claim 1 , further comprising a third semiconductor chip provided between the second semiconductor chip and the wiring substrate,
wherein the second and third semiconductor chips are electrically interconnected via a plurality of through-vias provided in the second semiconductor chip and a plurality of bumps provided between the second and third semiconductor chips.
4. The semiconductor device according to claim 1 , wherein a thickness of the first semiconductor chip is less than 30 micrometers (μm).
5. The semiconductor device according to claim 1 , wherein a thickness of the second semiconductor chip is in a range of 30 μm to 50 μm.
6. The semiconductor device according to claim 1 , wherein a pitch between the bumps is in a range of about 10 μm to about 100 μm.
7. The semiconductor device according to claim 1 , further comprising a plurality of through-vias that include at least one of copper (Cu), nickel (Ni), or tungsten (W).
8. A semiconductor device comprising:
a wiring substrate;
a first semiconductor chip provided on the wiring substrate;
a second semiconductor chip bonded to the first semiconductor chip, the second semiconductor chip having a substantially same size as the first semiconductor chip and comprising a rewiring layer; and
a third semiconductor chip bonded to the second semiconductor chip,
wherein a thickness of the first semiconductor chip is less than a thickness of the second semiconductor chip and is less than a thickness of the third semiconductor chip,
a first distance between the wiring substrate and the second semiconductor chip is shorter than a second distance between the wiring substrate and the first semiconductor chip,
a third distance between the wiring substrate and the third semiconductor chip is shorter than the first distance between the wiring substrate and the second semiconductor chip.
9. The semiconductor device according to claim 8 , wherein the thickness of the first semiconductor chip is less than 30 micrometers (μm).
10. The semiconductor device according to claim 9 , wherein the thicknesses of the second semiconductor chip and the third semiconductor chip are in a range of 30 μm to 50 μm.
11. The semiconductor device according to claim 8 , further comprising a first pad and a second pad electrically connected to the rewiring layer.
12. The semiconductor device according to claim 11 , wherein the first pad has a diameter in a range of 5 μm to 50 μm, and is electrically connected to a bump having a diameter in a range of 5 μm to 50 μm.
13. The semiconductor device according to claim 12 , wherein the second pad has a larger contact area than a contact area of the first pad by a factor of 2 or more, the second pad physically connected to the wiring substrate.