Non-volatile semiconductor memory device adapted to store a multi-valued data in a single memory cell
A non-volatile semiconductor memory device includes an electrically data rewritable non-volatile semiconductor memory cell and a write circuit for writing data in the memory cell, the write circuit writing a data in the memory cells by supplying a write voltage Vpgm and a write control voltage VBL to the memory cell, continuing the writing of the data in the memory cell by changing the value of the write control voltage VBL in response to an advent of a first write state of the memory cell and inhibiting any operation of writing a data to the memory cell by further changing the value of the write control voltage VBL to Vdd in response to an advent of a second write state of the memory cell.
1. A method of a write operation for a non-volatile semiconductor memory device, the write operation including a plurality of loops each including at least one program operation and at least one verify operation subsequent to the program operation, the method comprising at least one of the loops including:
increasing a threshold voltage of a memory cell in a program operation;
detecting whether or not the threshold voltage of the memory cell reaches a first threshold value in a first verify operation; and
detecting whether or not the threshold voltage of the memory cell reaches a second threshold value which is higher than the first threshold value in a second verify operation.
2. The method according to claim 1 , wherein a voltage for a program operation subsequent to the second verify operation is set based on a result of the first verify operation and a result of the second verify operation.
3. The method according to claim 1 , wherein a voltage of a word line connected to a control gate of the memory cell is not lowered during a period between the first verify operation and the second verify operation.
4. The method according to claim 1 , wherein a period between the first verify operation and the second verify operation is equal to or longer than a period between the program operation and the first verify operation.
5. The method according to claim 1 , wherein a period of the second verify operation is equal to or longer than a period of the first verify operation.
6. A method comprising:
writing data to a memory cell comprising:
increasing, during a program operation, a threshold voltage of a memory cell;
verifying the threshold voltage of the memory cell comprising:
detecting, during a first verify operation, whether or not the threshold voltage of the memory cell satisfies a first threshold value; and
detecting, during a second verify operation, whether or not the threshold voltage of the memory cell satisfies a second threshold value, wherein the second threshold value is higher than the first threshold value; and
recursively performing at least one loop,
wherein each loop of the at least one loop comprises the program operation and the verify operations.
7. The method according to claim 6 , wherein a voltage, for a program operation subsequent to the second verify operation, is set based on a result of the first verify operation's detection and based on a result of the second verify operation's detection.
8. The method according to claim 6 , wherein a voltage of a word line connected to a control gate of the memory cell is not lowered during a period between the first verify operation and the second verify operation.
9. The method according to claim 6 , wherein a period between the first verify operation and the second verify operation is equal to or longer than a period between the program operation and the first verify operation.
10. The method according to claim 6 , wherein a period of the second verify operation is equal to or longer than a period of the first verify operation.