Embedded processing system with multi-stage authentication
An embedded processing system includes processing circuitry configured to execute a plurality of computer executable instructions. The embedded processing system also includes a memory system configured to store a plurality of configuration items, where at least one of the configuration items includes a sequence of the computer executable instructions. The embedded processing system also includes an authentication control configured to authenticate an immutable anchor associated with the embedded processing system, authenticate integrity of a reconfigurable entity map associated with the memory system, authenticate the configuration items based on the reconfigurable entity map, and perform an accommodation measure based on an authentication failure of at least one of the configuration items.
1. An embedded processing system of a controller of a gas turbine engine, the embedded processing system comprising:
processing circuitry configured to execute a plurality of computer executable instructions;
a memory system configured to store a plurality of configuration items comprising a reconfigurable entity map that defines address ranges of one or more of the plurality of configuration items, wherein at least one of the plurality of configuration items comprises a sequence of the computer executable instructions including an application configured to control operation of the gas turbine engine; and
an authentication control configured to:
authenticate an immutable anchor associated with the embedded processing system, wherein authentication of the immutable anchor is performed upon receiving a reset signal at the embedded processing system of the controller of the gas turbine engine, and the immutable anchor is encoded in read-only storage;
authenticate integrity of the reconfigurable entity map upon successful authentication of the immutable anchor;
locate the one or more of the plurality of configuration items in the memory system based on accessing a list of address ranges in the reconfigurable entity map after performing integrity authentication of the reconfigurable entity map;
authenticate the one or more of the plurality of configuration items based on locating the plurality of configuration items in the memory system using the list of address ranges in the reconfigurable entity map and, upon power-up of the embedded processing system, skip authentication of at least one of the address ranges identified to be skipped in the reconfigurable entity map where the at least one of the address ranges was previously authenticated during reprogramming of the embedded processing system, wherein the one or more of the plurality of configuration items are stored in an encrypted format within the memory system, and the one or more of the plurality of configuration items are decrypted and written to volatile memory of the memory system upon authentication during a start-up process; and
perform an accommodation measure based on an authentication failure of at least one of the plurality of configuration items.
2. The embedded processing system of claim 1 , wherein the immutable anchor is hardware or software that establishes a root and chain of trust in authentication.
3. The embedded processing system of claim 1 , wherein the list of address ranges comprises two or more address ranges for one of the plurality of configuration items.
4. The embedded processing system of claim 1 , wherein two or more different accommodation measures are defined for the list of address ranges.
5. The embedded processing system of claim 1 , wherein the accommodation measure comprises one or more of: resetting the embedded processing system, switching the embedded processing system to a fail-safe mode of operation, and transmitting an authentication failure message on a communication interface.
6. The embedded processing system of claim 1 , wherein authentication comprises one or more asymmetric cryptographic methods using unique key pairs that result in an authentication failure based on an incorrect key, a missing key, or software that is tampered with resulting in the authentication failure.
7. The embedded processing system of claim 1 , wherein the reconfigurable entity map defines authentication requirements of the one or more of the plurality of configuration items, and authentication of the one or more of the plurality of configuration items is based on the authentication requirements defined in the reconfigurable entity map.
8. A method comprising:
authenticating, by an authentication control of an embedded processing system of a controller of a gas turbine engine, an immutable anchor associated with the embedded processing system, wherein the embedded processing system comprises a memory system configured to store a plurality of configuration items comprising a reconfigurable entity map that defines address ranges of one or more of the plurality of configuration items, wherein at least one of the plurality of configuration items comprises a sequence of the computer executable instructions including an application configured to control operation of the gas turbine engine, and wherein authentication of the immutable anchor is performed upon receiving a reset signal at the embedded processing system of the controller of the gas turbine engine, and the immutable anchor is encoded in read-only storage;
authenticating, by the authentication control, integrity of the reconfigurable entity map, upon successful authentication of the immutable anchor;
locating, by the authentication control, the one or more of the plurality of configuration items in the memory system based on accessing a list of address ranges in the reconfigurable entity map after performing integrity authentication of the reconfigurable entity map;
authenticating, by the authentication control, the one or more of the plurality of configuration items in the memory system based on the reconfigurable entity map, and, upon power-up of the embedded processing system, skipping authentication of at least one of the address ranges identified to be skipped in the reconfigurable entity map where the at least one of the address ranges was previously authenticated during reprogramming of the embedded processing system,
wherein the one or more of the plurality of configuration items are stored in an encrypted format within the memory system, and the one or more of the plurality of configuration items are decrypted and written to volatile memory of the memory system upon authentication during a start-up process; and
performing an accommodation measure based on an authentication failure of at least one of the plurality of configuration items.
9. The method of claim 8 , wherein the immutable anchor is hardware or software that establishes a root and chain of trust in authentication.
10. The method of claim 8 , wherein the list of address ranges comprises two or more address ranges for one of the configuration items.
11. The method of claim 8 , wherein two or more different accommodation measures are defined for the list of address ranges.
12. The method of claim 8 , wherein the accommodation measure comprises one or more of: resetting the embedded processing system, switching the embedded processing system to a fail-safe mode of operation, and transmitting an authentication failure message on a communication interface.
13. The method of claim 8 , wherein authentication comprises one or more asymmetric cryptographic methods using unique key pairs that result in an authentication failure based on an incorrect key, a missing key, or software that is tampered with resulting in the authentication failure.
14. The method of claim 8 , wherein the reconfigurable entity map defines authentication requirements of the one or more of the plurality of configuration items, and authenticating the one or more of the plurality of configuration items is based on the authentication requirements defined in the reconfigurable entity map.