IP Library Granted Patent US 11,061,610
Granted Patent B2
US 11,061,610 · App. 16/271,555 · Granted Jul 13, 2021

Memory system

Inventor: Hiroyuki Mitomi (Yokohama Kanagawa, JP)
Assignee: TOSHIBA MEMORY CORPORATION
G06F3/0659G06F3/0604G06F3/064G06F3/0679
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,061,610
App. No.
16/271,555
Granted
Jul 13, 2021
Kind
B2
Abstract

A memory system includes a controller and a semiconductor storage device a semiconductor storage device including a nonvolatile memory having a plurality of blocks and configured to execute commands from the controller. In response to a write command from the controller to write data into a block of the nonvolatile memory, the semiconductor storage device performs a write operation to write the data into the block of the nonvolatile memory, and upon detecting failure of writing the data into the block, the semiconductor storage device performs another write operation to write the data without notifying the controller of the failure of writing the data into the block.

Claims (47)

1. A memory system comprising:

a controller and a first volatile memory in which an address conversion table mapping logical addresses to physical addresses is stored; and

a semiconductor storage device including a nonvolatile memory having a first block including a first page and a second page, and a second block including a third page, and a second volatile memory in which a replacement table is stored, and configured to execute commands from the controller, wherein

in response to a write command from the controller to write data into the second page in the first block, the semiconductor storage device performs a write operation to write the data into the second page, and upon detecting failure of writing the data into the second page, the semiconductor storage device performs another write operation to write the data into the third page in the second block, without notifying the controller of the failure of writing the data into the second page,

wherein, when said another write operation is performed, information that indicates that the data is stored in the third page instead of the second page is stored in the replacement table and the address conversion table is not updated, and

wherein, after the write operation to write the data into the third page in the second block succeeds and the information that indicates that the data is stored in the third page instead of the second page, is stored in the replacement table,

in response to a first read command from the controller to read data from the second page in the first block, the semiconductor storage device performs a read operation to read the data from the third page in the second block, and

in response to a second read command from the controller to read data from the first page in the first block, the semiconductor storage device performs a read operation to read the data from the first page in the first block.

2. The memory system according to claim 1 , wherein

after the write operation to write the data into the third page in the second block succeeds, in response to another write command to write additional data into a fourth page in the first block, the semiconductor storage device performs a write operation to write the additional data into a fifth page in the second block.

3. The memory system according to claim 1 , wherein

upon detecting the failure of writing the data into the third page in the second block, the semiconductor storage device performs another write operation to write the data into a sixth page in a third block of the nonvolatile memory.

4. The memory system according to claim 1 , wherein

at the time of the write operation to write the data into the second page in the first block, valid data is already stored in the first page in the first block, and

at the time of the write operation to write the data into the third page in the second block, no other valid data is stored in the second block.

5. The memory system according to claim 1 , wherein

at the time of the write operation to write the data into the second page in the first block, valid data is already stored in the first page in the first block, and

prior to the write operation to write the data into the third page in the second block, the valid data is written into a seventh page in the second block.

6. The memory system according to claim 1 , wherein the data is written into the third page in the second block having a page number that is different from a page number designated in the write command.

7. The memory system according to claim 1 , wherein the data is written into the third page in the second block having a page number that is the same as a page number designated in the write command.

8. The memory system according to claim 1 , wherein the semiconductor storage device stores a mapping of the first block and the second page to the second block in the replacement table and consults the mapping in response to the first read command.

9. The memory system according to claim 1 , wherein

at the time of the first read command and the second read command, the first block has valid data stored therein.

10. A method of processing a write command from a controller in a semiconductor storage device, wherein the controller uses an address conversion table stored in a first volatile memory to manage mapping of logical addresses to physical addresses, and the semiconductor storage device includes a nonvolatile memory having a first block including a first page and a second page, and a second block including a third page, and a second volatile memory in which a replacement table is stored, said method comprising:

in response to a write command from the controller to write data into the second page in the first block, performing a write operation to write the data into the second page; and

upon detecting failure of writing the data into the second page, performing another write operation to write the data into the third page in the second block, without notifying the controller of the failure of writing the data into the-second page,

wherein, when said another write operation is performed, information that indicates that the data is stored in the third page instead of the second page is stored in the replacement table and the address conversion table is not updated, and

wherein, after the write operation to write the data into the third page in the second block succeeds and the information that indicates that the data is stored in the third page instead of the second page, is stored in the replacement table,

in response to a first read command from the controller to read data from the second page in the first block, performing a read operation to read the data from the third page in the second block, and

in response to a second read command from the controller to read data from the first page in the first block, performing a read operation to read the data from the first page in the first block.

11. The method according to claim 10 , further comprising:

after the write operation to write the data into the third page in the second block succeeds, in response to another write command to write additional data into a fourth page in the first block, performing a write operation to write the additional data into a fifth page in the second block.

12. The method according to claim 10 , further comprising:

upon detecting the failure of writing the data into the third page in the second block, performing another write operation to write the data into a sixth page in a third block of the nonvolatile memory.

13. The method according to claim 10 , wherein

at the time of the write operation to write the data into the second page in the first block, valid data is already stored in the first page in the first block, and

at the time of the write operation to write the data into the third page in the second block, no other valid data is stored in the second block.

14. The method according to claim 10 , wherein

at the time of the write operation to write the data into the second page in the first block, valid data is already stored in the first page in the first block, and

prior to the write operation to write the data into the third page in the second block, the valid data is written into a seventh page in the second block.

15. The method according to claim 10 , wherein the data is written into the third page in the second block having a page number that is different from a page number designated in the write command.

16. The method according to claim 10 , wherein the data is written into the third page in the second block having a page number that is the same as a page number designated in the write command.

17. The method according to claim 10 , further comprising:

storing a mapping of the first block and the second page to the second block in the replacement table; and

consulting the mapping in response to the first read command.

18. The method according to claim 10 , wherein

at the time of the first read command and the second read command, the first block has valid data stored therein.

Assignments (2)
CHANGE OF NAME AND ADDRESS Recorded Jan 31, 2022
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 058905/0582 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 8, 2019
From: MITOMI, HIROYUKI
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 048284/0327 →
Priority Claims (1)
JP JP2018-113505 · Jun 14, 2018 · national
Continuity (1)
Related Publication 20190384531A1 · Dec 19, 2019