IP Library Granted Patent US 10,879,693
Granted Patent B2
US 10,879,693 · App. 16/276,464 · Granted Dec 29, 2020

Systems having impedance source semiconductor device protection

Inventors: Christopher Harper (Glendale, WI); Jeffery Fischer (Cedarburg, WI); Ian Wallace (Whitefish Bay, WI)
Assignee: DRS NAVAL POWER SYSTEMS, INC.
H02H9/045H02H9/005
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Quick Facts
Patent No.
US 10,879,693
App. No.
16/276,464
Granted
Dec 29, 2020
Kind
B2
Abstract

A Z source network includes positive and negative input terminals and a first snubber circuit connected across the positive and negative input terminals. The first snubber circuit is configured to suppress voltage transients across the positive and negative input terminals. The Z source network also includes positive and negative output terminals and a second snubber circuit connected across the positive and negative output terminals. The second snubber circuit is configured to suppress voltage transients across the positive and negative output terminals.

Claims (42)

1. A Z source network, comprising:

positive and negative input terminals;

a first snubber circuit connected across the positive and negative input terminals, wherein the first snubber circuit is configured to suppress voltage transients across the positive and negative input terminals;

positive and negative output terminals; and

a second snubber circuit connected across the positive and negative output terminals, wherein the second snubber circuit is configured to suppress voltage transients across the positive and negative output terminals.

2. The Z source network of claim 1 , wherein a topology of the first snubber circuit is different from a topology of the second snubber circuit.

3. The Z source network of claim 1 , further comprising:

a diode having an anode connected to the positive input terminal and a cathode connected to an internal node of the Z source network;

a first inductor connected to the internal node and to the positive output terminal;

a first capacitor connected to the internal node and to the negative output terminal;

a second inductor connected to the negative input terminal and to the negative output terminal; and

a second capacitor connected to the negative input terminal and the positive output terminal.

4. The Z source network of claim 1 , further comprising a shunt capacitor connected to the positive and negative input terminals.

5. The Z source network of claim 1 , wherein the first snubber circuit comprises:

a first capacitor; and

a first electrical impedance in parallel with a first diode, wherein the first capacitor is in series with the parallel connected first diode and first electrical impedance.

6. The Z source network of claim 5 , wherein the second snubber circuit comprises:

a second capacitor;

a second electrical impedance in parallel with a second diode, wherein the second capacitor is in series with the parallel connected second diode and second electrical impedance; and

third and fourth capacitors, wherein the third and fourth capacitors are in series with the second capacitor and the parallel connected second diode and second electrical impedance.

7. The Z source network of claim 6 , wherein the first electrical impedance further comprises at least one of an additional resistor, a capacitor, and an inductor.

8. The Z source network of claim 6 , wherein the second electrical impedance further comprises at least one of an additional resistor, a capacitor, and an inductor.

9. The Z source network of claim 6 , further comprising:

a third diode having an anode connected to the positive input terminal and a cathode connected to an internal node of the Z source network;

a first inductor connected to the internal node and to the positive output terminal;

a fifth capacitor connected to the internal node and to the negative output terminal;

a second inductor connected to the negative input terminal and to the negative output terminal; and

a sixth capacitor connected to the negative input terminal and the positive output terminal.

10. The Z source network of claim 5 , wherein the first electrical impedance comprises a resistor.

11. The Z source network of claim 10 , wherein the first electrical impedance further comprises at least one of an additional resistor, an additional capacitor, and an inductor.

12. The Z source network of claim 5 , wherein the first electrical impedance is actively controlled.

13. The Z source network of claim 5 , further comprising an energy storage element or an energy conversion element in series with the first capacitor and the parallel connected first diode and first electrical impedance.

14. The Z source network of claim 1 , wherein the second snubber circuit comprises:

a first capacitor;

an electrical impedance in parallel with a diode, wherein the first capacitor is in series with the parallel connected diode and electrical impedance; and

second and third capacitors, wherein the second and third capacitors are in series with the first capacitor and the parallel connected diode and electrical impedance.

15. The Z source network of claim 14 , wherein the electrical impedance comprises a resistor.

16. The Z source network of claim 15 , wherein the electrical impedance further comprises at least one of an additional resistor, a capacitor, and an inductor.

17. The Z source network of claim 14 , wherein the electrical impedance is actively controlled.

18. The Z source network of claim 14 , further comprising an energy storage element or an energy conversion element in series with the first capacitor and the parallel connected diode and electrical impedance.

19. The Z source network of claim 14 , wherein the first capacitor, the electrical impedance, the diode, the second capacitor, and the third capacitor are integrated in a package.

20. The Z source network of claim 19 , wherein the positive and negative output terminals are connected to first and second terminals of a load, and wherein the package is connected to the load at the first and second terminals.

Assignments (2)
CHANGE OF NAME Recorded Sep 17, 2020
From: DRS POWER & CONTROL TECHNOLOGIES, INC.
To: DRS NAVAL POWER SYSTEMS, INC.
Reel/Frame 053805/0123 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 26, 2019
From: HARPER, CHRISTOPHER; FISCHER, JEFFERY; WALLACE, IAN
To: DRS POWER & CONTROL TECHNOLOGIES, INC.
Reel/Frame 048699/0915 →