Semiconductor device and semiconductor memory device
A semiconductor device according to an embodiment includes a semiconductor layer having a first plane and a second plane opposite to the first plane; a gate electrode; a gate insulating layer provided between the first plane and the gate electrode; and a pair of first p-type impurity regions provided in the semiconductor layer on both sides of the gate electrode, containing boron, carbon, and germanium, having a bond structure of boron and carbon, having a first boron concentration and a first depth in a direction from the first plane toward the second plane, and having a distance between the first p-type impurity regions being a first distance.
1. A semiconductor device comprising:
a semiconductor layer having a first face and a second face opposite to the first face;
a gate electrode;
a gate insulating layer provided between the first face and the gate electrode;
a pair of first p-type impurity regions provided in the semiconductor layer on both sides of the gate electrode, the first p-type impurity regions containing boron, carbon, and germanium, the first p-type impurity regions having a bond structure of boron and carbon, the first p-type impurity regions having a first boron concentration and a first depth in a direction from the first face toward the second face, the first p-type impurity regions having a distance between the first p-type impurity regions being a first distance, and each of the first p-type impurity regions including a portion having a carbon concentration higher than a germanium concentration; and
a pair of second p-type impurity regions provided in the semiconductor layer on both sides of the gate electrode, the second p-type impurity regions containing boron, the second p-type impurity regions having a second boron concentration lower than the first boron concentration, the second p-type impurity regions having a second depth smaller than the first depth in the direction from the first face toward the second face, the second p-type impurity regions having a distance between the second p-type impurity regions being a second distance shorter than the first distance, and the second p-type impurity regions having a germanium concentration lower than the germanium concentration of the first p-type impurity regions.
2. The semiconductor device according to claim 1 , wherein a depth of a region containing carbon in the first p-type impurity regions in the direction from the first face toward the second face is larger than the second depth.
3. The semiconductor device according to claim 1 , wherein the first boron concentration is 1×10 19 cm −3 or more and 1×10 22 cm −3 or less.
4. The semiconductor device according to claim 1 , wherein the carbon concentration of the portion is 1×10 19 cm −3 or more and 1×10 22 cm −3 or less.
5. The semiconductor device according to claim 1 , wherein a germanium concentration of the first p-type impurity regions is 5×10 19 cm −3 or more and 1×10 22 cm −3 or less.
6. The semiconductor device according to claim 1 , wherein a gate length of the gate electrode is 170 nm or less.
7. The semiconductor device according to claim 1 , further comprising an n-type impurity region provided between the first p-type impurity regions of the semiconductor layer, and the n-type impurity region having a carbon concentration lower than the carbon concentration of the portion.
8. The semiconductor device according to claim 1 , wherein the second p-type impurity regions do not include germanium.