IP Library Granted Patent US 10,922,054
Granted Patent B2
US 10,922,054 · App. 16/281,260 · Granted Feb 16, 2021

Apparatus and method

Inventors: Ryo Watanabe (Kawasaki, JP); Kazuhito Okita (Ota, JP)
Assignee: TOSHIBA MEMORY CORPORATION
G06F7/584H03K19/21G06F2207/581G06F2207/583
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Quick Facts
Patent No.
US 10,922,054
App. No.
16/281,260
Granted
Feb 16, 2021
Kind
B2
Abstract

According to one embodiment, an apparatus is capable of exchanging a frame with an external apparatus in a packet mode of a serial attached small computer system interface (SAS). The external apparatus includes a scrambler. The apparatus includes a descrambler and a controller. The descrambler is configured to descramble frame data scrambled by the scrambler. The controller is configured to, in a case where first frame data is received from the external apparatus, synchronize the descrambler with the scrambler using the first frame data and a first value that is to be scrambled by the scrambler to obtain the first frame data.

Claims (69)

1. An apparatus capable of exchanging a frame with an external apparatus in a packet mode of a serial attached small computer system interface (SAS), the external apparatus including a scrambler, the apparatus comprising:

a descrambler configured to descramble frame data scrambled by the scrambler; and

a controller configured to,

in a case where first frame data is received from the external apparatus,

synchronize the descrambler with the scrambler using the first frame data and a first value that is to be scrambled by the scrambler to obtain the first frame data.

2. The apparatus of claim 1 , wherein

the controller is further configured to calculate a second state of the descrambler using the first frame data and the first value, the second state corresponding to either a primitive received after the first frame data or second frame data received after the first frame data.

3. The apparatus of claim 2 , wherein

the controller is further configured to set the descrambler in the second state.

4. The apparatus of claim 2 , wherein

each of the scrambler and the descrambler includes a linear feedback shift register, and

the controller is further configured to:

calculate first scrambling data used for generation of the first frame data by performing an exclusive logical OR (XOR) operation on the first frame data with the first value;

calculate a first state of the linear feedback shift register at a point in time when the first scrambling data is generated, on the basis of the first scrambling data; and

calculate the second state using calculation to advance the linear feedback shift register from the first state.

5. The apparatus of claim 4 , wherein

the controller is further configured to set a second value to the linear feedback shift register in the descrambler, the second value corresponding to the second state of the descrambler.

6. The apparatus of claim 2 , wherein

the first frame data is included in a first frame, and

the second frame data is received immediately after all items of frame data that form the first frame are received.

7. The apparatus of claim 1 , wherein

the first frame data is included in a first frame, and

the controller is further configured to:

calculate a third state of the descrambler, the third state corresponding to a state of the descramble after completion of reception of the first frame; and

calculate second scrambling data to descramble items of frame data to form the first frame, using calculation to retreat the descrambler from the third state.

8. The apparatus of claim 7 , wherein

the descrambler is configured to descramble the items of frame data, and

the controller is configured to generate, in a case where a reception error occurs in the items of frame data descrambled by the descrambler, the first frame by descrambling the items of frame data using the second scrambling data.

9. The apparatus of claim 1 , wherein

the first frame data is included in a first field of a first frame,

the first frame is an IDENTIFY address frame,

the first field is a field having a size of at least N contiguous bits in a Reserved field of the IDENTIFY address frame, and

the first value is zero.

10. The apparatus of claim 9 , wherein

each of the scrambler and the descrambler includes a linear feedback shift register of N bits.

11. The apparatus of claim 1 , wherein

the first frame data is included in a first field of a first frame,

the first frame is an OPEN address frame,

the first field is a field having a size of at least N contiguous bits in a DESTINATION SAS ADDRESS FIELD of the OPEN address frame, and

the first value is a SAS address of the apparatus.

12. The apparatus of claim 11 , wherein

each of the scrambler and the descrambler includes a linear feedback shift register of N bits.

13. The apparatus of claim 1 , wherein

the first frame data is included in a first field of a first frame,

the first frame is an OPEN address frame,

the first field is a field having a size of at least N contiguous bits in a MORE COMPATIBLE FEATURES field of the OPEN address frame, and

the first value is zero.

14. The apparatus of claim 13 , wherein

each of the scrambler and the descrambler includes a linear feedback shift register of N bits.

15. The apparatus of claim 1 , wherein

the first frame data is included in a first field of a first frame,

the first frame is a serial small computer system interface protocol (SSP) frame,

the first field is a field having a size of at least N contiguous bits in a HASHED DESTINATION SAS ADDRESS FIELD of the SSP frame, and

the first value is a hashed value of a SAS address of the apparatus.

16. The apparatus of claim 15 , wherein

each of the scrambler and the descrambler includes a linear feedback shift register of N bits.

17. A method of controlling an apparatus, the apparatus being capable of exchanging a frame with an external apparatus in a packet mode of a serial attached small computer system interface (SAS), the external apparatus including a scrambler, the method comprising:

descrambling frame data scrambled by the scrambler; and

in a case where first frame data is received from the external apparatus, synchronizing the descrambler with the scrambler using the first frame data and a first value that is to be scrambled by the scrambler to obtain the first frame data.

18. The method of claim 17 , further comprising

calculating a second state of the descrambler using the first frame data and the first value, the second state corresponding to either a primitive received after the first frame data or second frame data received after the first frame data.

19. The method of claim 17 , wherein

the first frame data is included in a first frame, and

the method further comprising:

calculating a third state of the descrambler, the third state corresponding to a state of the descramble after completion of reception of the first frame; and

calculating second scrambling data to descramble items of frame data to form the first frame, using calculation to retreat the descrambler from the third state.

20. The method of claim 19 , further comprising:

descrambling the items of frame data; and

generating, in a case where a reception error occurs in the items of frame data descrambled by the descrambler, the first frame by descrambling the items of frame data using the second scrambling data.

Assignments (2)
CHANGE OF NAME AND ADDRESS Recorded Jan 31, 2022
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 058905/0582 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 21, 2019
From: WATANABE, RYO; OKITA, KAZUHITO
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 048393/0479 →
Priority Claims (1)
JP 2018-133290 · Jul 13, 2018 · national
Continuity (1)
Related Publication 20200019378A1 · Jan 16, 2020