IP Library Granted Patent US 10,601,510
Granted Patent B2
US 10,601,510 · App. 16/283,520 · Granted Mar 24, 2020

Systems and methods for delta-sigma digitization

Inventors: Jing Wang (Broomfield, CO); Luis Alberto Campos (Superior, CO); Zhensheng Jia (Superior, CO)
Assignee: Cable Television Laboratories, Inc.
H04B10/2575H03M3/424H03M3/43H03M3/454H03M3/496H04B1/0007H04B1/0042H04B10/25753
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Quick Facts
Patent No.
US 10,601,510
App. No.
16/283,520
Granted
Mar 24, 2020
Kind
B2
Abstract

A baseband processing unit includes a baseband processor configured to receive a plurality of component carriers of a radio access technology wireless service, and a delta-sigma digitization interface configured to digitize at least one carrier signal of the plurality of component carriers into a digitized bit stream, for transport over a transport medium, by (i) oversampling the at least one carrier signal, (ii) quantizing the oversampled carrier signal into the digitized bit stream using two or fewer quantization bits.

Claims (16)

1. A baseband processing unit (BBU), comprising:

a baseband processor configured to receive a plurality of component carriers of a radio access technology wireless service; and

a delta-sigma digitization interface comprising a delta-sigma analog-to-digital converter (ADC) configured to digitize at least one carrier signal of the plurality of component carriers into a digitized bit stream, for transport over a transport medium, by (i) oversampling the at least one carrier signal, (ii) quantizing the oversampled carrier signal into the digitized bit stream, wherein an input of the delta-sigma ADC includes at least one recursion loop from an output of the delta-sigma ADC.

2. The BBU of claim 1 , wherein the delta-sigma ADC comprises a one-bit quantizer.

3. The BBU of claim 2 , wherein the delta-sigma ADC further comprises a second-order impulse filter including at least two feedback loops.

4. The BBU of claim 2 , wherein the plurality of component carriers comprises 32 long term evolution carriers.

5. The BBU of claim 1 , wherein the delta-sigma ADC comprises a two-bit quantizer.

6. The BBU of claim 5 , wherein the delta-sigma ADC further comprises a second-order filter including at least two feedback loops.

7. The BBU of claim 5 , wherein the delta-sigma ADC further comprises a fourth-order filter including at least four feedback loops.

8. The BBU of claim 7 , wherein the fourth-order filter includes a plurality of feedforward coefficients and a plurality of feedback coefficients.

9. The BBU of claim 8 , wherein the plurality of feedforward coefficients and the plurality of feedback coefficients are tunable.

10. The BBU of claim 5 , wherein the plurality of component carriers comprises 32 long term evolution carriers.

11. The BBU of claim 5 , wherein the plurality of component carriers comprises 37 long term evolution carriers.

12. The BBU of claim 5 , wherein a first portion of the plurality of component carriers has a different modulation format than a second portion of the plurality of component carriers.

13. The BBU of claim 1 , wherein the delta-sigma ADC is further configured to quantizing the oversampled carrier signal into the digitized bit stream using two or fewer quantization bits.

14. The BBU of claim 5 , wherein the delta-sigma ADC further comprises an infinite impulse response filter.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 3, 2020
From: WANG, JING; CAMPOS, LUIS ALBERTO; JIA, ZHENSHENG
To: CABLE TELEVISION LABORATORIES, INC
Reel/Frame 052827/0772 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 20, 2019
From: WANG, JING; CAMPOS, LUIS ALBERTO; JIA, ZHENSHENG
To: CABLE TELEVISION LABORATORIES, INC
Reel/Frame 048652/0993 →
Continuity (4)
Continuation In Part 16191315 · Nov 14, 2018
Provisional Application 62586041 · Nov 14, 2017
Provisional Application 62633956 · Feb 22, 2018
Related Publication 20190190602A1 · Jun 20, 2019