Power converters and methods of controlling same
A power converter converts a medium-voltage output from a solar module to an appropriate voltage to power a solar tracker system. The power converter includes a voltage divider having at least two legs, a first semiconductor switch subassembly coupled in parallel with a first leg of the voltage divider, and a second semiconductor switch subassembly coupled in parallel with a second leg of the voltage divider. In implementations, the signals for driving the semiconductor switches of the first and second semiconductor switch subassemblies may be shifted out of phase from each other. In implementations, if the bus voltages to the semiconductor switches are not balanced, the pulse width of the driving signal of the semiconductor switch supplied with the higher bus voltage is decreased for at least one cycle.
1. A medium-voltage power converter comprising:
a voltage divider having at least two legs;
a first circuit subassembly including a first semiconductor switch and a first semiconductor device coupled together in series, the first circuit subassembly and a first leg of the at least two legs coupled together in parallel;
a second circuit subassembly including a second semiconductor switch and a second semiconductor device coupled together in series, the second circuit subassembly and a second leg of the at least two legs coupled together in parallel;
a first inductor having a first end and a second end, the first end coupled between the first semiconductor switch and the first semiconductor device, the second end coupled to a first output terminal;
a second inductor having a first end and a second end, the first end coupled between the second semiconductor switch and the second semiconductor device, the second end of the second inductor coupled to a second output terminal; and
a controller configured to generate a first pulsed signal for controlling the first semiconductor switch and a second pulsed signal for controlling the second semiconductor switch,
wherein the first pulsed signal is 180 degrees out of phase from the second pulsed signal.
2. The medium-voltage power converter of claim 1 , wherein each of the at least two legs of the voltage divider include a resistor and a capacitor coupled together in parallel.
3. The medium-voltage power converter of claim 1 , wherein the first and second semiconductor devices are diodes or semiconductor switches.
4. The medium-voltage power converter of claim 1 , further comprising a third circuit subassembly including a third semiconductor switch and a third semiconductor device coupled together in series, the third circuit subassembly and a third leg of the at least two legs coupled together in parallel.
5. The medium-voltage power converter of claim 4 , wherein the third semiconductor device is a diode or a semiconductor switch.
6. The medium-voltage power converter of claim 4 , wherein the first, second, and third semiconductor switches are metal-oxide-semiconductor field-effect transistors (MOSFETs) or insulated-gate bipolar transistors (IGBTs).
7. A method of operating a medium-voltage power converter, the method comprising:
synchronizing phases of drive signals applied to respective semiconductor switches coupled in parallel with respective legs of a voltage divider;
measuring a solar panel voltage;
measuring an output voltage of the medium-voltage power converter;
determining whether the solar panel voltage is greater than twice the output voltage; and
if the solar panel voltage is greater than twice the output voltage, shifting a phase of at least one of the drive signals so that the drive signals are out of phase from each other.
8. The method of claim 7 , wherein shifting the phases of the at least one of the drive signals includes shifting the phases of at least one of the drive signals so that the drive signals are out of phase from each other by 180 degrees.
9. The method of claim 7 , wherein the drive signals are pulse-width modulation (PWM) drive signals.
10. A method of operating a medium-voltage power converter, the method comprising:
measuring a first voltage supplied to a first semiconductor switch coupled in parallel with a first leg of a voltage divider;
measuring a second voltage supplied to a second semiconductor switch coupled in parallel with a second leg of the voltage divider;
comparing the first voltage with the second voltage;
if the first voltage is greater than the second voltage, decreasing a duty cycle of a drive signal applied to the second semiconductor switch in a next cycle; and
if the second voltage is greater than the first voltage, decreasing a duty cycle of a drive signal applied to the first semiconductor switch in a next cycle.
11. The method of claim 10 , wherein comparing the first voltage with the second voltage includes determining whether the first voltage is greater than the second voltage plus a predetermined voltage and determining whether the second voltage is greater than the first voltage plus the predetermined voltage.
12. The method of claim 10 , wherein decreasing the duty cycle of a drive signal includes decreasing the duty cycle of a drive signal to zero in a next cycle.
13. The method of claim 10 , further comprising generating a drive signal applied to the first semiconductor switch and a drive signal applied to the second semiconductor switch so that the drive signals are out of phase from each other.
14. The method of claim 13 , wherein the drive signals are 180 degrees out of phase from each other.
15. The method of claim 10 , wherein the drive signal is a pulse-width modulation (PWM) drive signal.
16. The method of claim 10 , wherein the duty cycle of the drive signal is decreased by a predetermined amount that brings the first voltage and the second voltage closer to each other.