Light emitting device with improved extraction efficiency
Methods and apparatus are described. An apparatus includes a hexagonal oxide substrate and a III-nitride semiconductor structure adjacent the hexagonal oxide substrate. The III-nitride semiconductor structure includes a light emitting layer between an n-type region and a p-type region. The hexagonal oxide substrate has an in-plane coefficient of thermal expansion (CTE) within 30% of a CTE of the III-nitride semiconductor structure.
1. A method of manufacturing a light-emitting device (LED) comprising:
providing a wafer comprising a plurality of III-nitride semiconductor layers on a non-III-nitride substrate that has an in-plane lattice constant not more than 1% different than a bulk lattice constant of at least one of the plurality III-nitride semiconductor layers;
attaching a first adhesive-coated film to a surface of one of the plurality of III-nitride semiconductor layers;
attaching a second adhesive-coated film to a surface of the non-III-nitride substrate; and
pulling the non-III-nitride substrate and the III-nitride semiconductor layers apart to remove the non-III-nitride substrate from the III-nitride semiconductor layers.
2. The method of claim 1 , wherein the non-III-nitride semiconductor substrate is a hexagonal oxide substrate having an in-plane coefficient of thermal expansion (CTE) within 30% of a CTE of the plurality of III-nitride semiconductor layers.
3. The method of claim 1 , wherein the non-III-nitride semiconductor substrate is formed from one of ScGaMgO 4 , ScAlMgO 4 , InAlMgO 4 , and ScAlMnO 4 .
4. The method of claim 1 , further comprising:
attaching a pre-formed ceramic phosphor to the wafer.
5. The method of claim 4 , wherein the attaching the pre-formed ceramic phosphor to the wafer comprises gluing or bonding the pre-formed ceramic phosphor to the wafer.
6. The method of claim 4 , wherein the attaching the pre-formed ceramic phosphor to the wafer comprises providing the pre-formed ceramic phosphor spaced apart from the wafer.
7. A method of manufacturing a light-emitting device (LED) comprising:
providing a wafer comprising a plurality of III-nitride semiconductor layers on a non-III-nitride substrate that has an in-plane lattice constant not more than 1% different than a bulk lattice constant of at least one of the plurality III-nitride semiconductor layers; and
using a blade to break an interface between the non-III substrate and the plurality of III-nitride semiconductor layers to remove the non-III-nitride substrate from the III-nitride semiconductor lavers.
8. The method of claim 7 , wherein the non-III-nitride semiconductor substrate is a hexagonal oxide substrate having an in-plane coefficient of thermal expansion (CTE) within 30% of a CTE of the plurality of III-nitride semiconductor layers.
9. The method of claim 7 , wherein the non-III-nitride semiconductor substrate is formed from one of ScGaMgO 4 , ScAlMgO 4 , InAlMgO 4 , and ScAlMnO 4 .
10. The method of claim 7 , further comprising attaching a pre-formed ceramic phosphor to the wafer.
11. The method of claim 10 , wherein the attaching the pre-formed ceramic phosphor to the wafer comprises gluing or bonding the pre-formed ceramic phosphor to the wafer.
12. The method of claim 10 , wherein the attaching the pre-formed ceramic phosphor to the wafer comprises providing the pre-formed ceramic phosphor spaced apart from the wafer.
13. A method of manufacturing a light-emitting device (LED) comprising:
providing a wafer comprising a plurality of III-nitride semiconductor layers on a non-III-nitride substrate that has an in-plane lattice constant not more than 1% different than a bulk lattice constant of at least one of the plurality III-nitride semiconductor layers; and
applying a temperature gradient across a surface normal of the plurality of III-nitride semiconductor layers and the hexagonal oxide substrate to remove the non-III-nitride substrate from the III-nitride semiconductor layers.
14. The method of claim 13 , wherein the non-III-nitride semiconductor substrate is a hexagonal oxide substrate having an in-plane coefficient of thermal expansion (CTE) within 30% of a CTE of the plurality of III-nitride semiconductor layers.
15. The method of claim 13 , wherein the non-III-nitride semiconductor substrate is formed from one of ScGaMgO 4 , ScAlMgO 4 , InAlMgO 4 , and ScAlMnO 4 .
16. The method of claim 13 , further comprising attaching a pre-formed ceramic phosphor to the wafer.
17. The method of claim 16 , wherein the attaching the pre-formed ceramic phosphor to the wafer comprises gluing or bonding the pre-formed ceramic phosphor to the wafer.
18. The method of claim 16 , wherein the attaching the pre-formed ceramic phosphor to the wafer comprises providing the pre-formed ceramic phosphor spaced apart from the wafer.