Voltage breakdown device for solar cells
Voltage breakdown devices for solar cells are described. For example, a solar cell includes a semiconductor substrate. A plurality of alternating N-type and P-type semiconductor regions is disposed in or above the substrate. A plurality of conductive contacts is coupled to the plurality of alternating N-type and P-type semiconductor regions. A voltage breakdown device is disposed above the substrate. The voltage breakdown device includes one of the plurality of conductive contacts in electrical contact with one of the N-type semiconductor regions and with one of the P-type semiconductor regions of the plurality of alternating N-type and P-type semiconductor regions disposed in or above the substrate.
1. A solar cell, comprising:
a semiconductor substrate;
a plurality of semiconductor regions disposed in or above the substrate;
a plurality of conductive contacts coupled to the plurality of semiconductor regions;
a secondary P/N junction disposed above the substrate, the secondary P/N junction to provide a bypass, and the secondary P/N junction comprising one of the plurality of conductive contacts in electrical contact with first and second semiconductor regions of the plurality of semiconductor regions, wherein the one of the plurality of conductive contacts is in direct contact with the first semiconductor region and is not in direct contact with the second semiconductor region; and
an N-type semiconductor layer between the one of the plurality of conductive contacts and the second semiconductor region, wherein the N-type semiconductor layer has an uppermost surface above an uppermost surface of the second semiconductor region.
2. The solar cell of claim 1 , wherein the semiconductor substrate is an N-type semiconductor substrate.
3. The solar cell of claim 1 , wherein the N-type semiconductor layer is an N-type doped amorphous silicon layer.
4. The solar cell of claim 1 , wherein a tunneling dielectric layer is disposed between the N-type semiconductor layer and the second semiconductor region.
5. The solar cell of claim 1 , wherein another of the plurality of conductive contacts is in direct contact with the second semiconductor region.
6. A solar cell, comprising:
a semiconductor substrate;
a plurality of semiconductor regions disposed in or above the substrate;
a plurality of conductive contacts coupled to the plurality of semiconductor regions;
a secondary P/N junction disposed above the substrate, the secondary P/N junction to perform a bypass function, and the secondary P/N junction comprising one of the plurality of conductive contacts in electrical contact with first and second semiconductor regions of the plurality of semiconductor regions, wherein the one of the plurality of conductive contacts is in direct contact with the first semiconductor region and is not in direct contact with the second semiconductor region; and
an N-type semiconductor layer between the one of the plurality of conductive contacts and the second semiconductor region, wherein the N-type semiconductor layer has an uppermost surface above an uppermost surface of the second semiconductor region.
7. The solar cell of claim 6 , wherein the semiconductor substrate is an N-type semiconductor substrate.
8. The solar cell of claim 6 , wherein the N-type semiconductor layer is an N-type doped amorphous silicon layer.
9. The solar cell of claim 6 , wherein a tunneling dielectric layer is disposed between the N-type semiconductor layer and the second semiconductor region.
10. The solar cell of claim 6 , wherein another of the plurality of conductive contacts is in direct contact with the second semiconductor region.