SEMICONDUCTOR MEMORY AND SEMICONDUCTOR MEMORY MANUFACTURING METHOD
A semiconductor memory includes a substrate having a first surface, a memory device mounted on the first surface, a controller mounted on the first surface, and a shielding layer between the first surface and at least a part of the controller, the shielding layer having a thickness that is large enough to block most of the alpha radiation from the substrate from reaching the part of the controller.
1 . A semiconductor memory comprising:
a substrate having a first surface;
a memory device mounted on the first surface;
a controller mounted on the first surface; and
a shielding layer between the first surface and at least apart of the controller, the shielding layer having a thickness that is large enough to block most of the alpha radiation from the substrate from reaching the part of the controller.
2 . The semiconductor memory according to claim 1 , wherein the shielding layer is a copper thin film having a thickness greater than or equal to 23 micrometers.
3 . The semiconductor memory according to claim 2 , wherein the shielding layer is between the first surface and all parts of the controller.
4 . The semiconductor memory according to claim 2 , wherein the controller includes a random access memory region and the shielding layer is between the first surface and the random access memory region.
5 . The semiconductor memory according to claim 1 , further comprising an adhesive material between the controller and the first surface.
6 . The semiconductor memory according to claim 5 , wherein the adhesive material is between the controller and the shielding layer, and the shielding layer makes direct contact with the substrate.
7 . The semiconductor memory according to claim 5 , wherein the adhesive material is between the controller and the shielding layer and between the shielding layer and the substrate.
8 . A semiconductor memory comprising:
a substrate having a first surface;
a memory device mounted on the first surface; and
a controller mounted on the first surface, wherein
the substrate includes a shielding layer at the first surface, such that at least a part of the controller is mounted on the shielding layer, the shielding layer having a thickness that is large enough to block most of the alpha radiation from the substrate from reaching the part of the controller.
9 . The semiconductor memory according to claim 8 , wherein the shielding layer is a copper thin film having a thickness greater than or equal to 23 micrometers.
10 . The semiconductor memory according to claim 9 , wherein all parts of the controller are mounted on the shielding layer.
11 . The semiconductor memory according to claim 9 , wherein the controller includes a random access memory region and only the random access memory region of the controller is mounted on the shielding layer.
12 . A semiconductor memory manufacturing method, comprising:
mounting a memory device on a first region of a substrate; and
mounting a controller on a second region of the substrate, as a result of which a shielding layer supports at least a part of the controller on the second region of the substrate, the shielding layer having a thickness that is large enough to block most of the alpha radiation from the substrate from reaching the part of the controller.
13 . The method according to claim 12 , further comprising:
forming a shielding layer on the second region of the substrate; and
forming a die attach film on the shielding layer,
wherein the controller is mounted on the shielding layer through the die attach film.
14 . The method according to claim 12 , further comprising:
forming a first die attach film on the second region of the substrate;
forming a shielding layer on the first die attach film; and
forming a second die attach film on the shielding layer,
wherein the controller is mounted on the shielding layer through the second die attach film.
15 . The method according to claim 12 , further comprising:
dicing a wafer having a plurality of controllers to form individual dies, one of dies including the controller.
16 . The method according to claim 15 , wherein the die including the controller further includes the shielding layer, which is attached to the controller through a die attach film, and the die is mounted on the substrate.
17 . The method according to claim 12 , wherein the shielding layer is a copper thin film having a thickness greater than or equal to 23 micrometers.
18 . The method according to claim 17 , wherein the shielding layer supports all parts of the controller.
19 . The method according to claim 18 , wherein the controller includes a random access memory region and the shielding layer only supports the random access memory region of the controller.