IP Library Granted Patent US 11,023,136
Granted Patent B2
US 11,023,136 · App. 16/289,339 · Granted Jun 1, 2021

Storage device and control method

Inventor: Hirotaka Higashi (Kawasaki Kanagawa, JP)
Assignee: TOSHIBA MEMORY CORPORATION
G06F3/0611G06F3/0656G06F3/0659G06F3/0679
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,023,136
App. No.
16/289,339
Granted
Jun 1, 2021
Kind
B2
Abstract

A storage device includes a non-volatile memory including a buffer of a first size and a controller. The controller is configured to transmit a control command to the non-volatile memory, and then repeat a process including a first process of changing a phase value of a timing signal indicating timing to read or write data from or to the non-volatile memory and a second process of reading or writing data having a second size smaller than the first size from or to the non-volatile memory in synchronization with the timing signal of the changed phase value, a certain plurality of times without transmitting any other control command to the non-volatile memory during repetition of the process.

Claims (45)

1. A storage device comprising:

a non-volatile memory including a buffer; and

a controller configured to transmit a control command to the non-volatile memory, and then to repeat a process including a phase changing process of changing a phase value of a timing signal indicating timing to read data from the non-volatile memory, a read process of reading a portion of data stored in the buffer in the non-volatile memory to the controller in synchronization with the timing signal of the changed phase value, and a determination process of determining whether or not the read process in synchronization with the timing signal of the changed phase value is successful, a certain plurality of times without transmitting any other control command to the non-volatile memory during repetition of the process.

2. The storage device according to claim 1 , wherein

the buffer has a first size, and the portion of the data read during the read process has a second size smaller than the first size, and

the controller is further configured to determine the certain plurality of times based on a value obtained by dividing the first size with the second size.

3. The storage device according to claim 1 , wherein

the controller is further configured to set an adjustment phase value of the timing signal based on a determination result of whether or not the read process is successful with respect to each of the phase values, and to read data from the non-volatile memory in synchronization with the timing signal of the adjustment phase value.

4. The storage device according to claim 3 , wherein

the controller is further configured to determine whether or not the read process is successful with respect to each of phase values changed by a first adjustment amount, and then to determine whether or not the read process is successful with respect to each of phase values changed by a second adjustment amount smaller than the first adjustment amount.

5. The storage device according to claim 4 , wherein the controller is further configured to determine the first adjustment amount based on a value obtained by dividing 180 degree with the certain plurality of times.

6. The storage device according to claim 1 , wherein

the controller is further configured to transmit a second control command to the non-volatile memory, and then to repeat a second process including a second phase changing process of changing a phase value of a second timing signal indicating timing to write data to the non-volatile memory and a write process of writing data from the controller to the buffer in the non-volatile memory in synchronization with the second timing signal of the changed phase value, a second certain plurality of times without transmitting any other control command to the non-volatile memory during repetition of the second process.

7. The storage device according to claim 6 , wherein the data written during the write process has a third size smaller than the first size, and the controller is further configured to determine the second certain plurality of times based on a value obtained by dividing the first size with the third size.

8. The storage device according to claim 6 , wherein

the controller is further configured to determine whether or not the write process is successful with respect to each of phase values, to set a second adjustment phase value of the second timing signal based on a determination result of whether or not the write process is successful with respect to each of the phase values, and to write data to the non-volatile memory in synchronization with the second timing signal of the second adjustment phase value.

9. The storage device according to claim 8 , wherein

the controller is further configured to determine whether or not the write process is successful with respect to each of phase values changed by a third adjustment amount, and then to determine whether or not the write process is successful with respect to each of phase values changed by a fourth adjustment amount smaller than the third adjustment amount.

10. The storage device according to claim 9 , wherein the controller is further configured to determine the third adjustment amount based on a value obtained by dividing 180 degree with the second certain plurality of times.

11. A storage device comprising:

a non-volatile memory including a buffer; and

a controller configured to transmit a control command to the non-volatile memory, and then to repeat a process including a phase changing process of changing a phase value of a timing signal indicating timing to write data to the non-volatile memory, a write process of writing data from the controller to the buffer in the non-volatile memory in synchronization with the timing signal of the changed phase value, and a determination process of determining whether or not the write process in synchronization with the timing signal of the changed phase value is successful, a certain plurality of times without transmitting any other control command to the non-volatile memory during repetition of the process.

12. The storage device according to claim 11 , wherein

the buffer has a first size, and the data written during the write process has a second size smaller than the first size, and

the controller is further configured to determine the certain plurality of times based on a value obtained by dividing the first size with the second size.

13. The storage device according to claim 11 , wherein

the controller is further configured to set an adjustment phase value of the timing signal based on a determination result of whether or not the write process is successful with respect to each of the phase values, and to write data to the non-volatile memory in synchronization with the timing signal of the adjustment phase value.

14. The storage device according to claim 13 , wherein

the controller is further configured to determine whether or not the write process is successful with respect to each of phase values changed by a first adjustment amount, and then to determine whether or not the write process is successful with respect to each of phase values changed by a second adjustment amount smaller than the first adjustment amount.

15. The storage device according to claim 14 , wherein the controller is further configured to determine the first adjustment amount based on a value obtained by dividing 180 degree with the certain plurality of times.

16. A method of controlling a non-volatile memory that includes a buffer, comprising:

transmitting a control command to the non-volatile memory; and

after transmitting the control command, repeating a process including a first process of changing a phase value of a timing signal indicating timing to read or write data from or to the non-volatile memory, a second process of reading or writing data from or to the buffer in the non-volatile memory in synchronization with the timing signal of the changed phase value, and a third process of determining whether or not the second process in synchronization with the timing signal of the changed phase value is successful, a certain plurality of times without transmitting any other control command to the non-volatile memory during repetition of the process.

17. The method of claim 16 , wherein

the buffer has a first size, and the data read or written during the second process has a second size smaller than the first size,

the method further comprising:

determining the certain plurality of times based on a value obtained by dividing the first size with the second size.

18. The method of claim 16 , further comprising:

setting an adjustment phase value of the timing signal based on a determination result of whether or not the second process is successful with respect to each of the phase values; and

accessing the non-volatile memory in synchronization with the timing signal of the adjustment phase value.

19. The method of claim 18 , wherein said determining whether or not the second process is successful with respect to each of phase values comprises:

determining whether or not the second process is successful with respect to each of phase values changed by a first adjustment amount; and then

determining whether or not the second process is successful with respect to each of phase values changed by a second adjustment amount smaller than the first adjustment amount.

20. The method of claim 19 , further comprising:

determining the first adjustment amount based on a value obtained by dividing 180 degree with the certain plurality of times.

Assignments (2)
CHANGE OF NAME AND ADDRESS Recorded Jan 31, 2022
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 058905/0582 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2019
From: HIGASHI, HIROTAKA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 049182/0315 →