IP Library Granted Patent US 10,998,283
Granted Patent B2
US 10,998,283 · App. 16/289,644 · Granted May 4, 2021

Semiconductor device production method

Inventors: Takahiko Kawasaki (Aichi, JP); Yukiteru Matsui (Aichi, JP); Akifumi Gawase (Mie, JP)
Assignee: TOSHIBA MEMORY CORPORATION
H01L24/27H01L24/03H01L24/05H01L24/08H01L24/29H01L24/32H01L24/83H01L24/92H01L24/94H01L25/18H01L25/50H01L2224/03616H01L2224/05166H01L2224/05181H01L2224/05647H01L2224/08145H01L2224/27616H01L2224/29186H01L2224/32145H01L2224/80006H01L2224/80815H01L2224/83005H01L2224/83012H01L2224/83026H01L2224/8389H01L2224/83896H01L2224/9211H01L2224/92142H01L2924/1431H01L2924/14511H01L2924/20106H01L2924/20107
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Quick Facts
Patent No.
US 10,998,283
App. No.
16/289,644
Granted
May 4, 2021
Kind
B2
Abstract

A semiconductor device production method includes forming a first recess portion in a first insulating film formed on a first substrate and a first conductive layer on the front surface of the first insulating film located inside and outside the first recess portion. In the first recess portion, a first pad is formed having a width of 3 μm or less and including the first conductive layer by performing a first polishing the first conductive layer at a first polishing rate and, after the first polishing, a second polishing the first conductive layer at a second polishing rate lower than the first polishing rate. The first pad of the first substrate and a second pad of a second substrate are joined together by annealing the first substrate and the second substrate. The selection ratio of the first conductive layer to the first insulating film is 0.3 to 0.4.

Claims (19)

1. A semiconductor device production method comprising:

forming a first recess portion in a first insulating film formed on a first substrate;

forming a first conductive layer on a front surface of the first insulating film located both inside and outside the first recess portion;

forming, in the first recess portion, a first pad having a width equal to or less than 3 μm and equal to or greater than 1.5 μm and including the first conductive layer by performing a first process of polishing the first conductive layer at a first polishing rate and, after the first process, a second process of polishing the first conductive layer at a second polishing rate which is lower than the first polishing rate, wherein the second process is performed such that a selection ratio of the first conductive layer to the first insulating film is 0.3 to 0.4;

joining the first pad of the first substrate and a second pad of a second substrate together by annealing the first substrate and the second substrate; and

forming the first conductive layer on the front surface of the first insulating film, which is located both inside and outside the first recess portion and having another conductive layer placed therebetween.

2. The semiconductor device production method according to claim 1 , wherein the first conductive layer contains copper.

3. The semiconductor device production method according to claim 1 , wherein the another conductive layer contains titanium.

4. The semiconductor device production method according to claim 1 , wherein joining the first pad of the first substrate and the second pad of the second substrate together by the annealing the first substrate and the second substrate comprises annealing the first substrate and the second substrate at a temperature between 200° C. and 300° C., inclusive.

5. The semiconductor device production method according to claim 1 , wherein the second process is performed by using a second slurry which is different from a first slurry used in the first process.

6. The semiconductor device production method according to claim 1 , wherein the second process is performed by using alkaline slurry.

7. The semiconductor device production method according to claim 1 , wherein a planar shape of the first pad is a square or rectangle with sides each being 3 μm or less in length.

8. The semiconductor device production method according to claim 1 , wherein a planar shape of the second pad is identical to the planar shape of the first pad.

9. The semiconductor device production method according to claim 1 , further comprising:

forming a second recess portion in a second insulating film formed on the second substrate;

forming a second conductive layer on a front surface of the second insulating film located both inside and outside the second recess portion; and

forming, in the second recess portion, the second pad having a width of 3 μm or less and including the second conductive layer by performing a third process of polishing the second conductive layer at a third polishing rate and, after the third process, a fourth process of polishing the second conductive layer at a fourth polishing rate which is lower than the third polishing rate,

wherein the fourth process is performed such that a selection ratio of the second insulating film to the second conductive layer is 0.3 to 0.4.

10. The semiconductor device production method according to claim 1 , wherein the selection ratio of the first conductive layer to the first insulating film is 0.35 to 0.39.

Assignments (2)
CHANGE OF NAME AND ADDRESS Recorded Jan 31, 2022
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 058905/0582 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 17, 2019
From: KAWASAKI, TAKAHIKO; MATSUI, YUKITERU; GAWASE, AKIFUMI
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 049488/0368 →