IP Library Granted Patent US 10,600,932
Granted Patent B2
US 10,600,932 · App. 16/291,808 · Granted Mar 24, 2020

Manufacturing method of optoelectronic semiconductor device

Inventor: Hsien-Te Chen (Taipei, TW)
Assignee: ULTRA DISPLAY TECHNOLOGY CORP.
H01L33/0095H01L27/153H01L33/007H01L33/52H01L2933/005H01L2933/0033
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Quick Facts
Patent No.
US 10,600,932
App. No.
16/291,808
Granted
Mar 24, 2020
Kind
B2
Abstract

A manufacturing method of an optoelectronic semiconductor device includes: providing a matrix substrate, which comprises a substrate and a matrix circuit disposed on the substrate; transferring a plurality of micro-sized optoelectronic semiconductor elements from a temporary substrate to the matrix substrate, wherein the micro-sized optoelectronic semiconductor elements are separately disposed on the matrix substrate, and at least one electrode of each micro-sized optoelectronic semiconductor element is electrically connected with the matrix circuit; forming a protective layer completely covering the micro-sized optoelectronic semiconductor elements, wherein the height of the protective layer is greater than the height of the micro-sized optoelectronic semiconductor elements; and grinding the protective layer until a residual on a back surface of each micro-sized optoelectronic semiconductor element and the back surface are removed to expose a new surface.

Claims (12)

1. A manufacturing method of an optoelectronic semiconductor device, comprising:

providing a matrix substrate, wherein the matrix substrate comprises a substrate and a matrix circuit disposed on the substrate;

transferring a plurality of micro-sized optoelectronic semiconductor elements from a temporary substrate to the matrix substrate, wherein the micro-sized optoelectronic semiconductor elements are separately disposed on the matrix substrate, and at least one electrode of each of the micro-sized optoelectronic semiconductor elements is electrically connected with the matrix circuit;

forming a protective layer completely covering the micro-sized optoelectronic semiconductor elements, wherein a height of the protective layer is greater than a height of the micro-sized optoelectronic semiconductor elements; and

grinding the protective layer until a residual on a back surface of each of the micro-sized optoelectronic semiconductor elements and the back surface are removed to expose a new surface.

2. The manufacturing method according to claim 1 , wherein each of the micro-sized optoelectronic semiconductor elements comprises a p-type semiconductor layer, a light-emitting layer, an n-type semiconductor layer, a non-doped layer and a buffer layer, and the grinding step is to remove the buffer layer and a part of the non-doped layer.

3. The manufacturing method according to claim 2 , wherein the grinding step is to remove the buffer layer and to reduce a thickness of the non-doped layer to less than 1.8 μm.

4. The manufacturing method according to claim 1 , wherein the grinding step is to planarize the back surface of the micro-sized optoelectronic semiconductor element and make the new surface of the micro-sized optoelectronic semiconductor element be leveled with a surface of the adjacent protective layer away from the matrix substrate, and a height difference between the protective layer and the micro-sized optoelectronic semiconductor element is less than 0.02 μm.

5. The manufacturing method according to claim 1 , further comprising:

disposing a protective substrate on the micro-sized optoelectronic semiconductor elements, so that the micro-sized optoelectronic semiconductor elements and the protective layer are located between the protective substrate and the matrix substrate.

6. The manufacturing method according to claim 5 , wherein a refractive index of the protective layer is equal to that of the protective substrate, or a difference between the refractive indexes of the protective layer and the protective substrate is less than 10% of the refractive index of the protective layer or the protective substrate.

7. The manufacturing method according to claim 5 , wherein a refractive index of the protective layer is between that of the protective substrate and that of the micro-sized optoelectronic semiconductor element.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 12, 2023
From: ULTRA DISPLAY TECHNOLOGY CORP.
To: LG DISPLAY CO., LTD.
Reel/Frame 064222/0581 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 4, 2019
From: CHEN, HSIEN-TE
To: ULTRA DISPLAY TECHNOLOGY CORP.
Reel/Frame 048495/0817 →
Priority Claims (1)
TW 107107726 A · Mar 7, 2018 · national
Continuity (1)
Related Publication 20190280151A1 · Sep 12, 2019