Semiconductor memory device and manufacturing method thereof
A semiconductor memory device of embodiments includes a semiconductor substrate having a first and a second region adjacent to the first region in a first direction, a laminated body including electrode layers laminated on the semiconductor substrate in a second direction, a first insulator splitting the laminated body at the second region in a third direction, and extending in the first and second direction, and branching into two insulator films at the first region, and enclosing continuously a first portion of the laminated body, a contact portion extending in the first portion in the second direction, and a memory portion extending through the laminated body and the first insulator in the second direction at the second region. A first width in the third direction of the first portion is wider than a second width in the third direction of at least one of the electrode layers at the second region.
1. A semiconductor memory device comprising:
a semiconductor substrate, the semiconductor substrate having a first region and a second region adjacent to the first region in a first direction parallel to the semiconductor substrate;
a laminated body including a plurality of electrode layers laminated on the first region and the second region of the semiconductor substrate in a second direction perpendicular to the semiconductor substrate;
a first insulator splitting the laminated body at the second region in a third direction orthogonal to the first direction and second direction, and extending in the first direction and the second direction, and branching into two insulator films at the first region, and enclosing continuously a first portion of the laminated body with the two insulator films;
a contact portion extending in the first portion of the laminated body in the second direction; and
a memory portion extending through the laminated body and the first insulator in the second direction at the second region,
wherein a first width in the third direction of the first portion of the laminated body is wider than a second width in the third direction of at least one of the electrode layers split with the first insulator at the second region.
2. The semiconductor memory device according to claim 1 , further comprising:
a conductive layer provided between the semiconductor substrate and the laminated body,
wherein a lower end of the contact portion is connected to the conductive layer.
3. The semiconductor memory device according to claim 1 ,
wherein a plurality of the contact portions are provided within the one first portion.
4. The semiconductor memory device according to claim 1 , further comprising:
a second insulator to extend in the first direction and partially split the laminated body within the first portion.
5. The semiconductor memory device according to claim 4 ,
wherein the contact portion penetrates through the second insulator.