IP Library Granted Patent US 11,095,256
Granted Patent B2
US 11,095,256 · App. 16/298,157 · Granted Aug 17, 2021

Semiconductor device

Inventors: Toshiki Seshita (Kawasaki Kanagawa, JP); Yasuhiko Kuriyama (Yokohama Kanagawa, JP)
Assignees: Kabushiki Kaisha Toshiba; Toshiba Electronic Devices & Storage Corporation
H03F3/193H03F1/0211H03F3/72H03F2200/372
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Quick Facts
Patent No.
US 11,095,256
App. No.
16/298,157
Granted
Aug 17, 2021
Kind
B2
Abstract

A semiconductor device includes three transistors, five switches, two inductors, and a capacitor. A first transistor has a gate. The switches have one terminal connected in series with a drain of the first transistor in parallel. A second transistor has a source connected to the first switch and a grounded gate. A third transistor having a source connected to the second switch and a grounded gate. A first inductor and a second inductor each has one terminal connected in series with the third switch in parallel. A fourth switch has one terminal connected to the first inductor and another terminal connected to the source of the second transistor. A fifth switch has one terminal connected to the second inductor and another terminal connected to the source of the third transistor. A capacitor connected between the one terminal of the fourth switch and the one terminal of the fifth switch.

Claims (74)

1. A semiconductor device comprising:

a first transistor having a gate into which a high-frequency signal is inputted;

a first switch, a second switch, and a third switch each of which has one terminal connected in series with a drain of the first transistor and which are connected in parallel;

a second transistor having a source connected to another terminal of the first switch and a gate at which a high-frequency component is grounded;

a third transistor having a source connected to another terminal of the second switch and a gate at which a high-frequency component is grounded;

a first inductor and a second inductor each of which has one terminal connected in series with another terminal of the third switch and which are connected in parallel;

a fourth switch having one terminal connected to another terminal of the first inductor and another terminal connected to the source of the second transistor;

a fifth switch having one terminal connected to another terminal of the second inductor and another terminal connected to the source of the third transistor; and

a capacitor connected between the one terminal of the fourth switch and the one terminal of the fifth switch, wherein

when the high-frequency signal is inputted, a signal amplified with low noise is outputted from at least one of a first port connected to a drain of the second transistor and a second port connected to a drain of the third transistor.

2. The semiconductor device according to claim 1 , wherein

a gate length of the first transistor is shorter than a gate length of the second transistor and a gate length of the third transistor, and a gate oxide film thickness of the first transistor is smaller than a gate oxide film thickness of the second transistor and a gate oxide film thickness of the third transistor.

3. The semiconductor device according to claim 1 , wherein

a potential to be applied to the gate of the first transistor is controlled to be higher in the case of outputting the inputted high-frequency signal from both the first port and the second port than in the case of outputting the inputted high-frequency signal from one of the first port and the second port.

4. The semiconductor device according to claim 1 , wherein

an inductance connected to a source of the first transistor is controlled to be smaller in the case of outputting the inputted high-frequency signal from both the first port and the second port than in the case of outputting the inputted high-frequency signal from one of the first port and the second port.

5. The semiconductor device according to claim 1 , wherein

a gate capacitor connected to the gate of the first transistor and an external inductor connected to the gate capacitor outside the semiconductor device are connected, and the inputted high-frequency signal is inputted via the gate capacitor and the external inductor to the gate of the first transistor.

6. The semiconductor device according to claim 5 , in the case of outputting the inputted high-frequency signal from both the first port and the second port, further comprising:

an input-side resonant capacitor in parallel with the external inductor; and

an input-side grounded capacitor between the external inductor and a ground potential on a side of the external inductor into which the high-frequency signal is inputted.

7. A semiconductor device comprising:

a first transistor (FET 1 ) having a gate into which a high-frequency signal is inputted;

a first switch, a second switch, and a third switch each of which has one terminal connected in series with a drain of the first transistor and which are connected in parallel;

a second transistor having a source connected to another terminal of the first switch and a gate at which a high-frequency component is grounded;

a third transistor having a source connected to another terminal of the second switch and a gate at which a high-frequency component is grounded;

a first inductor and a second inductor each of which has one terminal connected in series with another terminal of the third switch and which are connected in parallel;

a fourth transistor having a source connected to another terminal of the first inductor and a gate at which a high-frequency component is grounded;

a fifth transistor having a source connected to another terminal of the second inductor and a gate at which a high-frequency component is grounded;

a fourth switch having one terminal connected to a drain of the fourth transistor and another terminal connected to the source of the second transistor;

a fifth switch having one terminal connected to a drain of the fifth transistor and another terminal connected to the source of the third transistor; and

a capacitor connected between the source of the fourth transistor and the source of the fifth transistor, wherein

when the high-frequency signal is inputted, a signal amplified with low noise is outputted from at least one of a first port connected to a drain of the second transistor and a second port connected to a drain of the third transistor.

8. The semiconductor device according to claim 7 , further comprising:

a distortion compensation circuit connected to each of the drain of the fourth transistor, the drain of the fifth transistor, and the drain of the first transistor.

9. The semiconductor device according to claim 7 , wherein

a potential to be applied to the gate of the first transistor is controlled to be higher in the case of outputting the inputted high-frequency signal from both the first port and the second port than in the case of outputting the inputted high-frequency signal from one of the first port and the second port.

10. The semiconductor device according to claim 7 , wherein

a potential to be applied to the gates of the second transistor and the third transistor is controlled to be higher in the case of outputting the inputted high-frequency signal from both the first port and the second port than in the case of outputting the inputted high-frequency signal from one of the first port and the second port.

11. A semiconductor device comprising:

a first transistor having a gate into which a high-frequency signal is inputted;

a first switch and a second switch each of which has one terminal connected in series with a drain of the first transistor and which are connected in parallel;

a second transistor having a source connected to another terminal of the first switch and a gate at which a high-frequency component is grounded;

a third transistor having a source connected to another terminal of the second switch and a gate at which a high-frequency component is grounded;

a first inductor and a second inductor each of which has one terminal connected in series with the drain of the first transistor and which are connected in parallel;

a third switch having one terminal connected to another terminal of the first inductor;

a fourth switch having one terminal connected to another terminal of the second inductor; and

a capacitor connected between another terminal of the third switch and another terminal of the fourth switch, wherein

when the high-frequency signal is inputted, a signal amplified with low noise is outputted from at least one of a first port connected to a drain of the second transistor and a second port connected to a drain of the third transistor.

12. The semiconductor device according to claim 11 , wherein:

in a case of outputting the inputted high-frequency signal from the first port connected to the second transistor,

the first switch is turned on, and

the second switch, the third switch and the fourth switch are turned off;

in a case of outputting the inputted hi-frequency signal from the second port connected to the third transistor,

the second switch is turned on, and

the first switch, the third switch and the fourth switch are turned off; and

in a case of outputting the inputted high-frequency signal from both the first port and the second port,

the first switch and the second switch are turned off, and

the third switch and the fourth switch are turned on.

13. The semiconductor device according to claim 11 , further comprising;

a fourth transistor having a source connected to the drain of the second transistor; and

a fifth transistor having a source connected to the drain of the third transistor.

14. The semiconductor device according to claim 13 , wherein:

in the case of outputting the inputted high-frequency signal from one of the first port and the second port, the second transistor and the third transistor operate in a linear region; and

in the case of outputting the inputted high-frequency signal from both the first port and the second port, the second transistor, the third transistor, the fourth transistor, and the fifth transistor operate in a saturation region.

15. The semiconductor device according to claim 11 , wherein

a potential to be applied to the gate of the first transistor is controlled to be higher in the case of outputting the inputted high-frequency signal from both the first port and the second port than in the case of outputting the inputted high-frequency signal from one of the first port and the second port.

16. The semiconductor device according to claim 11 , wherein

an inductance connected to the source of the first transistor is controlled to be smaller in the case of outputting the inputted high-frequency signal from both the first port and the second port than in the case of outputting the inputted high-frequency signal from one of the first port and the second port.

17. The semiconductor device according to claim 11 , wherein

a gate capacitor connected to the gate of the first transistor and an external inductor connected to the gate capacitor outside the semiconductor device are connected, and the inputted high-frequency signal is inputted via the gate capacitor and the external inductor to the gate of the first transistor.

18. The semiconductor device according to claim 17 , in the case of outputting the inputted high-frequency signal from both the first port and the second port, further comprising:

an input-side resonant capacitor in parallel with the external inductor; and

an input-side grounded capacitor between the external inductor and a ground potential on a side of the external inductor into which the high-frequency signal is inputted.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 11, 2019
From: SESHITA, TOSHIKI; KURIYAMA, YASUHIKO
To: KABUSHIKI KAISHA TOSHIBA; TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
Reel/Frame 048560/0705 →
Priority Claims (1)
JP JP2018-102583 · May 29, 2018 · national
Continuity (1)
Related Publication 20190372534A1 · Dec 5, 2019