Semiconductor device
A semiconductor device capable of enhancing uniformity of temperatures of transistors in an active clamp state while maintaining current performance is provided. A power transistor is connected to a power transistor in parallel. An active clamp circuit is provided in a path from a connection point between the power transistors to a gate of the power transistor and is conducted in a case where a voltage of the connection point exceeds a first threshold. An active clamp cutoff circuit is provided in a path from the active clamp circuit to a gate of the power transistor and cuts off or suppresses a current flowing into the path.
1. A semiconductor device comprising:
a first transistor including a first control electrode;
a second transistor connected to the first transistor in parallel and including a second control electrode;
an active clamp circuit configured to be provided in a first path from a first connection point between the first transistor and the second transistor to the first control electrode and to be conducted in a case where a voltage of the first connection point exceeds a first threshold; and
an active clamp cutoff circuit configured to be provided in a second path from the active clamp circuit to the second control electrode and to cut off or suppress a current flowing into the second path, wherein
the first control electrode and the second control electrode are gates.
2. The semiconductor device according to claim 1 , further comprising:
a semiconductor substrate, wherein
the first transistor is formed in a first region on the semiconductor substrate, and
the second transistor is formed in a second region adjacent to the first region.
3. The semiconductor device according to claim 2 , wherein
the first region includes two regions adjacent to the second region.
4. The semiconductor device according to claim 3 , wherein
the second region is positioned in a center part of the semiconductor substrate.
5. The semiconductor device according to claim 1 , further comprising:
a temperature detection circuit configured to detect a temperature of the second transistor, wherein
the active clamp cutoff circuit includes a third transistor which is turned on in a case where the temperature of the second transistor is equal to or lower than a second threshold and is turned off in a case where the temperature of the second transistor exceeds the second threshold.
6. The semiconductor device according to claim 5 , wherein
the active clamp cutoff circuit includes a resistor connected to the third transistor in parallel.
7. The semiconductor device according to claim 1 , further comprising:
an active clamp detection circuit configured to detect an active clamp state indicating a state where the active clamp circuit is conducted, wherein
the active clamp cutoff circuit includes a third transistor which is turned on in a case where the active clamp state is not detected and is turned off in a case where the active clamp state is detected.
8. The semiconductor device according to claim 4 , wherein
a temperature of the second transistor in a case where the second transistor is turned on is higher than a temperature of the first transistor in a case where the first transistor is turned on.
9. The semiconductor device according to claim 5 , wherein
the temperature detection circuit includes a thermal diode of which a forward voltage is decreased as a temperature increases and a comparator which compares the forward voltage of the thermal diode with a reference voltage.
10. The semiconductor device according to claim 2 , wherein
the first transistor includes first-group semiconductor elements arranged in parallel on the semiconductor substrate,
the second transistor includes second-group semiconductor elements arranged in parallel on the semiconductor substrate, and
the semiconductor element is a MOSFET or an IGBT.
11. The semiconductor device according to claim 1 , further comprising:
a first resistor connected between a second connection point between the first transistor and the second transistor and the first control electrode; and
a second resistor connected between the second connection point and the second control electrode.