Pixel driving circuit with wide range input voltage

1. A pixel driving circuit, the pixel driving circuit comprising:

a driving sub-circuit comprising N driving transistors connected in series, N being an integer greater than 1, wherein the N driving transistors include a first driving transistor having a drain electrode coupled to a power-supply port and an N-th driving transistor having a source electrode coupled to a light-emitting diode;

a power-storage sub-circuit coupled to a gate electrode of the first driving transistor and the source electrode of the N-th driving transistor; and

a charge-input sub-circuit configured to have the gate electrode of the first driving transistor to receive a data voltage under control of a first control signal at a turn-on voltage level.

2. The pixel driving circuit of claim 1 , wherein the N driving transistors connected in series comprises an n-th driving transistor and an (n+1)-th driving transistor connected in series; and

a source electrode of the n-th driving transistor is coupled to both a gate electrode and a drain electrode of the (n+1)-th driving transistor, wherein n is a positive integer and (n+1) is smaller than or equal to N, the first control signal is supplied from a first scan line and the data voltage is supplied from a data line.

3. The pixel driving circuit of claim 2 , wherein the N driving transistors are a same type, wherein N=3, and n≤2.

4. The pixel driving circuit of claim 2 , wherein the charge-input sub-circuit comprises a charge-input transistor having a gate electrode coupled to the first scan line, a drain electrode coupled to the data line, and a source electrode coupled to the gate electrode of the first driving transistor.

5. The pixel driving circuit of claim 1 , further comprising:

an emission-control sub-circuit configured to connect the source electrode of the N-th driving transistor to the light-emitting diode under control of a second control signal at a turn-on voltage level from a second scan line or to disconnect the source electrode of the N-th driving transistor from the light-emitting diode under control of a second control signal at a turn-off voltage level from a second scan line.

6. The pixel driving circuit of claim 5 , wherein the emission-control sub-circuit comprises an emission-control transistor including a gate electrode coupled to the second scan line, a drain electrode coupled to the source electrode of the N-th driving transistor, and a source electrode coupled to light-emitting diode.

7. The pixel driving circuit of claim 1 wherein a difference between threshold voltages of any two driving transistors in the N driving transistors has an absolute value substantially the same.

8. The pixel driving circuit of claim 1 , wherein the power-storage sub-circuit comprises a capacitor having a first electrode coupled to the gate electrode of the first driving transistor and a second electrode coupled to the source electrode of the N-th driving transistor.

9. The pixel driving circuit of claim 1 , further comprising:

a discharge sub-circuit configured to connect the source electrode of the N-th driving transistor to a ground port under control of a third control signal from a third scan line.

10. The pixel driving circuit of claim 9 , wherein the discharge sub-circuit comprises a discharge transistor having a gate electrode coupled to the third scan line, a drain electrode coupled to the source electrode of the N-th driving transistor, and a source electrode coupled to the ground port.

11. A method of driving a pixel driving circuit in a cycle time for displaying one frame of image, wherein the cycle time comprises sequentially a charging period, a data-inputting period, and an emitting period, the pixel driving circuit comprising:

a driving sub-circuit comprising N driving transistors connected in series, N being an integer greater than 1, wherein the N driving transistors include a first driving transistor having a drain electrode coupled to a power-supply port and an N-th driving transistor having a source electrode coupled to a light-emitting diode;

a power-storage sub-circuit coupled to a gate electrode of the first driving transistor and the source electrode of the N-th driving transistor; and

a charge-input sub-circuit configured to have the gate electrode of the first driving transistor to receive a data voltage under control of a first control signal at a turn-on voltage level;

the method comprising:

in the charging period,

writing a reference voltage from a data line to the gate electrode of the first driving transistor by the charge-input sub-circuit under control of the first control signal at a turn-on voltage level from a first scan line, thereby making the N driving transistors connected in series in conduction state;

charging the power-storage sub-circuit; and

pulling up a voltage level at a first electrode of a capacitor in the power-storage sub-circuit until the N driving transistors are turned off;

in the data-inputting period,

providing a data voltage to the data line;

writing the data voltage from the data line to the gate electrode of the first driving transistor by the charge-input sub-circuit under control of the first control signal from the first scan line;

changing a voltage level at a second electrode of the capacitor in the power-storage sub-circuit by coupling a change from the reference voltage to the data voltage at the first electrode of the capacitor; and

in the emitting period,

disconnecting the gate electrode of the first driving transistor from the data line by the charge-input sub-circuit under control of the first control signal from the first scan line; and

passing a driving current through the N driving transistors connected in series to drive emission of a light-emitting diode;

wherein N is an integer greater than 1.

12. The method of claim 11 , wherein the pixel driving circuit comprises an emission-control sub-circuit configured to connect the source electrode of the N-th driving transistor to the light-emitting diode, the method further comprising:

disconnecting the source electrode of the N-th driving transistor from the light-emitting diode by the emission-control sub-circuit under control of a second control signal from a second scan line in the charging period;

disconnecting the source electrode of the N-th driving transistor from the light-emitting diode by the emission-control sub-circuit under control of the second control signal from the second scan line in the data-inputting period; and

connecting the source electrode of the N-th driving transistor to the light-emitting diode by the emission-control sub-circuit under control of the second control signal from the second scan line in the emitting period.

13. The method of claim 12 , wherein the pixel driving circuit further comprises a discharge sub-circuit configured to use a third control signal from a third scan line to control a connection between the source electrode of the N-th driving transistor and a ground port; wherein the cycle time further includes a resetting period before the charging period; the method further comprising, in the resetting period:

disconnecting the source electrode of the N-th driving transistor from the light-emitting diode by the emission-control sub-circuit under control of the second control signal from the second scan line;

connecting the source electrode of the N-th driving transistor to the ground port by the discharge sub-circuit under control of the third control signal from the third scan line;

providing a reference voltage to a data line;

writing the reference voltage to the gate electrode of the first driving transistor by the charge-input sub-circuit under control of the first control signal from the first scan line, thereby making the N driving transistors connected in series in conduction state and releasing residue charges in the power-storage sub-circuit to the ground port.

14. The method of claim 11 , wherein each of the N driving transistors is an n-type transistor and the data voltage is set to be greater than the reference voltage.

15. The method of claim 11 , wherein each of the N driving transistors is a p-type transistor and the data voltage is set to be smaller than the reference voltage.

16. The method of claim 11 , wherein the pixel driving circuit further comprises a discharge sub-circuit configured to use a third control signal from a third scan line to control a connection between the source electrode of the N-th driving transistor and a ground port; wherein the cycle time further includes a resetting period before the charging period; the method further comprising, in the resetting period:

connecting the source electrode of the N-th driving transistor to the ground port by the discharge sub-circuit under control of the third control signal from the third scan line;

providing a reference voltage to the data line;

writing the reference voltage to the gate electrode of the first driving transistor by the charge-input sub-circuit under control of the first control signal from the first scan line, thereby making the N driving transistors connected in series in conduction state, and releasing residue charges in the power-storage sub-circuit to a ground port.

17. The method of claim 16 , further comprising disconnecting the source electrode of the N-th driving transistor from the discharge port by the discharge sub-circuit under control of the third control signal from the third scan line in each of the charging period, the data-inputting period, and the emitting period.

18. A pixel circuit comprising a light-emitting device and a pixel driving circuit of claim 1 including a driving sub-circuit having N driving transistors connected in series, wherein a first driving transistor of the N driving transistor is a first transistor in the series and the N-th driving transistor of the N driving transistors is a last transistor in the series, wherein the first driving transistor has a drain electrode coupled to a power-supply port and the N-th driving transistor has a source electrode coupled to the light-emitting device, wherein N is an integer greater than 1.

19. The pixel circuit of claim 18 , wherein the N driving transistors connected in series comprise an n-th driving transistor connected to an (n+1)-th driving transistor, wherein a source electrode of the n-th driving transistor is coupled to both a gate electrode and a drain electrode of the (n+1)-th driving transistor, wherein n is a positive integer and (n+1) is smaller than or equal to N.

20. A display apparatus comprising a pixel circuit of claim 18 .