Transport block segmentation for multi-level codes

1. A wireless communication method of wireless communication in which data is transmitted in units of transport blocks, comprising:

dividing bits of a transport block into a plurality of code blocks, wherein each code block of the plurality of code blocks corresponds to a bit-level of a multi-level modulation scheme used for transmission, and wherein a size of each code block is inversely proportional to a corresponding coding rate used for coding the code block;

processing the plurality of code blocks to generate an output signal; and

transmitting the output signal.

2. The method of claim 1 , wherein processing the plurality of code blocks includes:

resizing, based on a maximum size of a code block of the plurality of code blocks, each code block to generate a plurality of resized code blocks; and

generating the output signal using the plurality of resized code blocks.

3. The method of claim 2 , wherein the resizing operation includes:

further dividing each code block into a smaller size that is less than the maximum size to generate the plurality of resized code blocks.

4. The method of claim 2 , wherein the maximum size is equal to 6144 bits.

5. The method of claim 2 , wherein the maximum size is equal to 8448 bits.

6. The method of claim 1 , wherein the multi-level modulation scheme includes an M-level amplitude modulation scheme, and wherein a number of the plurality of code blocks, C, is C=½ log 2 M.

7. The method of claim 6 , wherein the size of each code block satisfies a condition:

2

⁢

⌈

K

1

+

L

2

⁢

R

1

⌉

=

2

⁢

⌈

K

2

+

L

2

⁢

R

2

⌉

=

…

=

2

⁢

⌈

K

C

+

L

2

⁢

R

C

⌉

wherein K i represents a size of i th code block, L represents a size of a cyclic redundancy code and R i represents a corresponding code rate used for processing the i th code block.

8. The method of claim 1 , wherein the operation of dividing bits of the transport block includes stuffing filler bits such that a same number of symbols are used for each bit level.

9. The method of claim 1 , wherein the processing the plurality of code blocks to generate the output signal includes performing in-phase and quadrature modulation on the plurality of code blocks.

10. The method of claim 1 , wherein the operation of processing the plurality of code blocks to generate the output signal includes:

concatenating the plurality of code blocks to generate a concatenated code block sequence; and

interleaving the concatenated code block sequence to generate an interleaved concatenated code block sequence, wherein the interleaving is performed at each bit level; and

mapping the interleaved concatenated code block sequence to a QAM constellation.

11. A wireless data transmission apparatus, comprising

a first circuit at which data is received for transmission over a network;

a second circuit which organizes the data into a plurality of code blocks;

a processor that processes the plurality of code blocks to generate a quadrature amplitude modulation (QAM)-modulated output signal; and

a transmitter circuit that transmits the QAM-modulated output signal,

wherein sizes of the plurality of code blocks are selected such that at least one code block per bit level of a multi-level encoding is used, wherein each of the plurality of code blocks has a size less than or equal to a maximum size, wherein a size of each code block is inversely proportional to a corresponding coding rate used for coding the code block, and wherein coded bit levels occupy a same number of QAM symbols.

12. The apparatus of claim 11 , the processing the plurality of code blocks includes:

resizing, selectively based on a maximum size of a code block of the plurality of code blocks, the each code block to generate a plurality of resized code blocks; and

using the plurality of resized code blocks to generate the output signal.

13. The apparatus of claim 12 , wherein the resizing operation includes:

further dividing each code block into a smaller size that is less than the maximum size to generate the plurality of resized code blocks.

14. The apparatus of claim 12 , wherein the maximum size is equal to 6144 bits.

15. The apparatus of claim 12 , wherein the maximum size is equal to 8448 bits.

16. The apparatus of claim 11 , wherein the plurality of code blocks corresponds to a multi-level modulation scheme that includes an M-level quadrature amplitude modulation scheme, and wherein a number of the plurality of code blocks, C, is equal to C=½ log 2 M.

17. The apparatus of claim 16 , wherein the size of each code block satisfies a condition:

2

⁢

⌈

K

1

+

L

2

⁢

R

1

⌉

=

2

⁢

⌈

K

2

+

L

2

⁢

R

2

⌉

=

…

=

2

⁢

⌈

K

C

+

L

2

⁢

R

C

⌉

where K i represents a size of i th code block, L represents a size of a cyclic redundancy code and R i represents a corresponding code rate used for processing the i th code block.

18. The apparatus of claim 11 , wherein the operation of organizing the data includes stuffing filler bits such that a same number of symbols are used for each bit level.

19. The apparatus of claim 11 , wherein the processing the plurality of code blocks to generate the output signal includes performing in-phase and quadrature modulation on the plurality of code blocks.

20. The apparatus of claim 11 , wherein the operation of processing the plurality of code blocks to generate the output signal includes:

concatenating the plurality of code blocks to generate a concatenated code block sequence; and

interleaving the concatenated code block sequence to generate an interleaved concatenated code block sequence, wherein the interleaving is performed at each bit level; and

mapping the interleaved concatenated code block sequence to a QAM constellation.