Offset system and method for multi-bit digital-to-analog converters
Methods adapted for digital-to-analog conversion compensation and systems are described. In a compensation method, inputs of a digital-to-analog converter (DAC) are adjusted to provide an even number inputs for the DAC. Further, one or more analog input signals are converted to generate one or more corresponding digital output signals. The one or more digital output signals are compensated to compensate for the adjustment of the inputs of the DAC.
1. A digital-to-analog conversion compensation method, comprising:
adjusting a number of digital inputs signals to a digital-to-analog converter (DAC) from an odd number of digital input signals to an even number of digital input signals;
converting, using the DAC, the even number of digital input signals to generate corresponding analog output signals; and
compensating the analog output signals to compensate for the adjustment of the number of digital input signals to generate an odd number of analog output signals corresponding to the odd number of digital input signals.
2. The digital-to-analog conversion compensation method of claim 1 , wherein:
the adjusting comprises adding a digital offset value as an additional input to existing inputs of the DAC to provide the even number of digital input signals; and
the compensating comprises removing an analog offset value from the analog output signals to generate the odd number of analog output signals.
3. The digital-to-analog conversion compensation method of claim 2 , wherein the digital offset value and the analog offset value are fixed values.
4. The digital-to-analog conversion compensation method of claim 2 , wherein the analog offset value corresponds to a digital value having an opposite magnitude than that of the digital offset value.
5. The digital-to-analog conversion compensation method of claim 2 , wherein the analog offset value is an additive inverse of the digital offset value.
6. The digital-to-analog conversion compensation method of claim 2 , further comprising linearizing at least a subset of the even number of digital input signals to generate corresponding linearized digital input signals, wherein one or more of the analog output signals are generated based on corresponding ones of the linearized digital input signals.
7. The digital-to-analog conversion compensation method of claim 2 , wherein:
the DAC comprises a linearizer that is configured to linearize a subset of the even number of digital input signals to generate corresponding linearized digital input signals; and
wherein one or more of the analog output signals are generated based on corresponding ones of the linearized digital input signals.
8. A non-transitory computer readable medium comprising program instructions, when executed, causes a processor to perform the method of claim 1 .
9. A digital-to-analog conversion system, comprising:
a digital-to-analog converter (DAC);
a digital offset generator that is configured to adjust a number of digital inputs signals to a digital-to-analog converter (DAC) from an odd number of digital input signals to an even number of digital input signals, wherein the DAC is configured to convert the even number of digital input signals to generate corresponding analog output signals; and
an analog offset compensator that is configured to compensate the analog output signals to compensate for the adjustment of the number of digital input signals to generate an odd number of analog output signals corresponding to the odd number of digital input signals.
10. The digital-to-analog conversion system of claim 9 , wherein:
the digital offset generator is configured to add a digital offset value as an additional input to existing inputs of the DAC to provide the even number of digital input signals; and
the analog offset compensator is configured to remove an analog offset value from the analog output signals to generate the odd number of analog output signals.
11. The digital-to-analog conversion system of claim 10 , wherein the digital offset value and the analog offset value are fixed values.
12. The digital-to-analog conversion system of claim 10 , wherein the analog offset value corresponds to a digital value having an opposite magnitude than that of the digital offset value.
13. The digital-to-analog conversion system of claim 10 , wherein the analog offset value is an additive inverse of the digital offset value.
14. The digital-to-analog conversion system of claim 9 , further comprising:
a linearizer that is configured to linearize at least a subset of the even number of digital input signals to generate corresponding linearized digital input signals, wherein one or more of the analog output signals are generated based on corresponding ones of the linearized digital input signals.
15. The digital-to-analog conversion system of claim 9 , wherein:
the DAC comprises a linearizer that is configured to linearize a subset of the even number of digital input signals to generate corresponding linearized digital input signals; and
wherein one or more of the analog output signals are generated based on corresponding ones of the linearized digital input signals.
16. A digital-to-analog converter (DAC), comprising:
a converter that is configured to:
receive a digital offset value and an odd number of digital inputs signals to the DAC;
adjust the odd number of digital inputs signals based on the digital offset value to generate an even number of digital input signals; and
convert the even number of digital input signals to generate corresponding analog output signals; and
an analog offset compensator that is configured to compensate the analog output signals to generate an odd number of analog output signals corresponding to the odd number of digital input signals.
17. The DAC of claim 16 , further comprising:
a digital offset generator that is configured generate the digital offset value and provide the digital offset value to the converter.
18. The DAC of claim 17 , wherein the analog offset compensator is configured to remove an analog offset value from the analog output signals to compensate the analog output signals.
19. The DAC of claim 16 , wherein the analog offset compensator is configured to remove an analog offset value from the analog output signals to compensate the analog output signals.
20. The DAC of claim 19 , wherein the analog offset value corresponds to a digital value having an opposite magnitude than that of the digital offset value.
21. The DAC of claim 16 , wherein the converter is configured to add the digital offset value as an additional input to existing inputs of the DAC to adjust the odd number of digital inputs signals and generate the even number of digital input signals.
22. The DAC of claim 16 , further comprising:
a linearizer that is configured to linearize a subset of the even number of digital input signals to generate corresponding linearized digital input signals, wherein the converter is configured to generate the analog output signals based on the linearized digital input signals and a remainder of the even number of digital input signals.