IP Library Granted Patent US 11,087,981
Granted Patent B2
US 11,087,981 · App. 16/349,780 · Granted Aug 10, 2021

Poly-silicon layer and method of manufacturing the same, methods of manufacturing thin film transistor and array substrate

Inventor: Huijuan Zhang (Beijing, CN)
Assignee: BOE TECHNOLOGY GROUP CO., LTD.
H01L21/02675H01L21/02532H01L21/02592H01L27/1274H01L29/66757
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Quick Facts
Patent No.
US 11,087,981
App. No.
16/349,780
Granted
Aug 10, 2021
Kind
B2
Abstract

A poly-silicon layer and a method of manufacturing the same, methods of manufacturing a thin film transistor, and an array substrate are provided. The method of manufacturing the poly-silicon layer includes forming an amorphous silicon layer, crystallizing the amorphous silicon layer to form a first poly-silicon layer, and processing the first poly-silicon layer to form a second poly-silicon layer using a green laser annealing process.

Claims (26)

1. A method of manufacturing a poly-silicon layer, comprising:

forming an amorphous silicon layer;

crystallizing the amorphous silicon layer to form a first poly-silicon layer; and

processing the first poly-silicon layer to form a second poly-silicon layer using a green laser annealing process, wherein the crystallizing comprises crystallizing the amorphous silicon layer to form the first poly-silicon layer using an excimer laser annealing process, and the excimer laser adopted in the excimer laser annealing process has an energy density ranging from about 260 J/cm 2 to about 340 J/cm 2 .

2. The method of manufacturing the poly-silicon layer according to claim 1 , wherein the first poly-silicon layer has an average grain size ranging from about 180 nm to about 200 nm.

3. The method of manufacturing the poly-silicon layer according to claim 1 , wherein the green laser annealing process comprises scanning the first poly-silicon layer by a green laser.

4. The method of manufacturing the poly-silicon layer according to claim 3 , wherein the green laser has a wavelength ranging from about 500 nm to about 560 nm and an energy density ranging from about 300 mJ/cm 2 to about 400 mJ/cm 2 .

5. The method of manufacturing the poly-silicon layer according to claim 1 , wherein the second poly-silicon layer has an average grain size ranging from about 300 nm to about 320 nm.

6. The method of manufacturing the poly-silicon layer according to claim 1 , wherein grain sizes of the second poly-silicon layer has a standard deviation less than about 80 nm.

7. The method of manufacturing the poly-silicon layer according to claim 1 , further comprising:

de-hydrogenating the amorphous silicon layer before the crystallizing.

8. The method of manufacturing the poly-silicon layer according to claim 1 , further comprising:

providing a substrate, and

forming a buffer layer on the substrate before forming the amorphous silicon layer,

wherein the amorphous silicon layer is formed on the buffer layer.

9. A poly-silicon layer manufactured by the method according to claim 1 .

10. A method of manufacturing a thin film transistor, comprising:

forming a gate electrode, a poly-silicon active layer, a gate electrode insulating layer, a source electrode and a drain electrode,

wherein the poly-silicon active layer is formed by the method according to claim 1 .

11. The method of manufacturing the thin film transistor according to claim 10 , further comprising:

doping the poly-silicon active layer with the gate electrode as a mask after forming the gate electrode.

12. A method of manufacturing an array substrate, wherein the array substrate comprises a plurality of thin film transistors arranged in an array, and the method comprises:

preparing the plurality of thin film transistors by the method according to claim 10 .

13. The method of manufacturing the poly-silicon layer according to claim 2 , wherein the green laser annealing process comprises scanning the first poly-silicon layer by a green laser.

14. The method of manufacturing the poly-silicon layer according to claim 13 , wherein the green laser has a wavelength ranging from about 500 nm to about 560 nm and an energy density ranging from about 300 mJ/cm 2 to about 400 mJ/cm 2 .

15. The method of manufacturing the poly-silicon layer according to claim 14 , wherein the second poly-silicon layer has an average grain size ranging from about 300 nm to about 320 nm.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 27, 2022
From: BOE TECHNOLOGY GROUP CO., LTD.
To: BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
Reel/Frame 060826/0252 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 14, 2019
From: ZHANG, HUIJUAN
To: BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 049174/0133 →
Priority Claims (1)
CN 201810402853.6 · Apr 28, 2018 · national
Continuity (1)
Related Publication 20200273703A1 · Aug 27, 2020