LDPC decoding device, memory system including the same and method thereof
A low density parity check (LDPC) decoding device includes a data generator for generating information with a first precision; a data converter for converting the information into a message with a second precision greater than the first precision; and a decoding processor for performing a low density parity check (LDPC) decoding using the message to generate decoded data.
1. A decoding device comprising:
a data generator suitable for generating information comprised of a first number of bits representing a first precision;
a data converter suitable for converting the information into a message comprised of a second number of bits representing a second precision greater than the first precision; and
a decoding processor suitable for performing a low density parity check (LDPC) decoding using the message to generate decoded data.
2. The decoding device of claim 1 , wherein the data generator receives read data from a memory device, and generates the information for indicating a certainty associated with a decision of the read data.
3. The decoding device of claim 1 , wherein the data converter includes a mapping table storing the message corresponding to the information.
4. The decoding device of claim 1 , wherein the information includes a 3-bit codeword.
5. The decoding device of claim 4 , wherein the message includes a 4-bit codeword.
6. The decoding device of claim 5 , wherein the message has a sign for indicating a decision of a bit value thereof, and a magnitude for indicating the certainty associated with the decision.
7. A memory system comprising:
a memory device; and
a memory controller suitable for controlling the memory device to perform a read operation,
wherein the memory controller includes a decoding device including:
a data generator suitable for receiving data read from the memory device and generating soft decision data for the read data, the soft decision data comprised of a first number of bits representing a first precision;
a data converter suitable for converting the soft decision data into a message comprised of a second number of bits representing a second precision greater than the first precision; and
a decoding processor suitable for performing a low density probability check (LDPC) decoding using the message to generate decoded data.
8. The memory system of claim 7 , wherein the data generator includes a soft decision data generator suitable for receiving the read data from the memory device, and generating the soft decision data indicating a certainty associated with a decision of the read data.
9. The memory system of claim 7 , wherein the data converter includes a mapping table, which stores the message corresponding to the soft decision data.
10. The memory system of claim 7 , wherein the soft decision data includes a 3-bit codeword.
11. The memory system of claim 10 , wherein the message includes a 4-bit codeword.
12. The memory system of claim 11 , wherein the message has a sign for indicating a decision of a bit value thereof, and a magnitude for indicating the certainty associated with the decision.
13. A method for operating a memory system including a memory device and a memory controller suitable for controlling the memory device to perform a read operation, the method comprising:
receiving data read from the memory device;
generating soft decision data for the read data, the soft decision data comprised of a first number of bits representing a first precision;
converting the soft decision data into a message comprised of a second number of bits representing a second precision greater than the first precision; and
performing a low density probability check (LDPC) decoding using the message to generate decoded data.
14. The method of claim 13 , wherein the generating of the soft decision data for the read data includes generating the soft decision data indicating a certainty associated with a decision of the read data.
15. The method of claim 13 , wherein the converting of the soft decision data into the message includes converting the soft decision data into the message using a mapping table, which stores the message corresponding to the soft decision data.
16. The method of claim 13 , wherein the soft decision data includes a 3-bit codeword.
17. The method of claim 16 , wherein the message includes a 4-bit codeword.
18. The method of claim 17 , wherein the message has a sign for indicating a decision of a bit value thereof, and a magnitude for indicating the certainty associated with the decision.